Sandy Huang 9fad8c5fa8 drm: drm_fourcc: add NV20 and NV30 format ... DRM_FORMAT_NV20 and DRM_FORMAT_NV30 is a 2 plane format suitable for linear layouts, this two format is similar to NV15 has no padding between component, but NV15 is 4:2:0 sub-sampling, NV20 is 4:2:2 sub-sampling and NV30 is no-sampling. The '20' and '30' suffix refers to the optimum effective bits per pixel which is achieved. Signed-off-by: Sandy Huang <hjc@rock-chips.com> Change-Id: I84da7e03125e675f274c6307128b4b7b307767cc		2021-07-12 15:01:19 +08:00
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amdgpu_drm.h	drm/amdgpu: new ids flag for tmz (v2)	2020-08-06 15:45:52 -04:00
armada_drm.h
drm_fourcc.h	drm: drm_fourcc: add NV20 and NV30 format	2021-07-12 15:01:19 +08:00
drm_mode.h	rk: revert to v4.19	2021-03-17 18:05:39 +08:00
drm_sarea.h
drm.h	rk: revert to v4.19	2021-03-17 18:05:39 +08:00
etnaviv_drm.h
exynos_drm.h	drm/exynos: Rename Exynos to lowercase	2020-01-21 09:09:42 +09:00
i810_drm.h
i915_drm.h	rk: revert to v4.19	2021-03-17 18:05:39 +08:00
lima_drm.h	drm/lima: support heap buffer creation	2020-01-27 22:01:09 +08:00
mga_drm.h
msm_drm.h	drm: msm_drm.h: delete duplicated words in comments	2020-07-15 14:02:58 +02:00
nouveau_drm.h	drm/nouveau: support synchronous pushbuf submission	2020-01-29 15:49:56 +10:00
omap_drm.h
panfrost_drm.h
qxl_drm.h
r128_drm.h
radeon_drm.h
rockchip_drm.h
savage_drm.h
sis_drm.h
tegra_drm.h
v3d_drm.h
vc4_drm.h
vgem_drm.h
via_drm.h
virtgpu_drm.h	rk: revert to v4.19	2021-03-17 18:05:39 +08:00
vmwgfx_drm.h	drm/vmwgfx: Add SM5 param for userspace	2020-03-23 22:48:57 +01:00