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bd0b0782e7
This patch add pll frac freq around 1G for audio product, which will do fine tune pll for async clk situation, such as BT, UAC. Because we have no much more PLLs, and much more devices share the same PLL, so, we should setup around 1G to serve all the devices. PLLs in rv1106: APLL: CPU DPLL: DDR GPLL: DEVICES CPLL: DEVICES GPLL: 1188MHz CPLL: 1000MHz * PLLs support frac mode: GPLL DPLL So, the only way to use audio pll frac freq is to switch to use GPLL. and switch the role of GPLL and CPLL. GPLL: audio frac freq (~1G) CPLL: 1188MHz Tested by UAC product, so, we first address this. and, of course, there still have chance apply this to other situation, such as IPC. but, need more test. at this time, we just handle for UAC. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Change-Id: Ief13456b6274802836266228d3288d91a148feff |
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