linux/arch
Will Deacon a507adf4f0 arm64: compat: fix vfp save/restore across signal handlers in big-endian
commit bdec97a855 upstream.

When saving/restoring the VFP registers from a compat (AArch32)
signal frame, we rely on the compat registers forming a prefix of the
native register file and therefore make use of copy_{to,from}_user to
transfer between the native fpsimd_state and the compat_vfp_sigframe.

Unfortunately, this doesn't work so well in a big-endian environment.
Our fpsimd save/restore code operates directly on 128-bit quantities
(Q registers) whereas the compat_vfp_sigframe represents the registers
as an array of 64-bit (D) registers. The architecture packs the compat D
registers into the Q registers, with the least significant bytes holding
the lower register. Consequently, we need to swap the 64-bit halves when
converting between these two representations on a big-endian machine.

This patch replaces the __copy_{to,from}_user invocations in our
compat VFP signal handling code with explicit __put_user loops that
operate on 64-bit values and swap them accordingly.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-01 12:07:29 +02:00
..
alpha vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
arc ARC: make sure instruction_pointer() returns unsigned value 2015-08-10 12:20:30 -07:00
arm ARM: 7819/1: fiq: Cast the first argument of flush_icache_range() 2015-08-16 20:51:42 -07:00
arm64 arm64: compat: fix vfp save/restore across signal handlers in big-endian 2015-10-01 12:07:29 +02:00
avr32 vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
blackfin blackfin updates for Linux 3.10 2013-05-10 07:21:16 -07:00
c6x C6x: time: Ensure consistency in __init 2015-05-06 21:56:28 +02:00
cris vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
frv vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
h8300 We get rid of the general module prefix confusion with a binary config option, 2013-05-05 10:58:06 -07:00
hexagon arch: mm: pass userspace fault flag to generic fault handler 2014-11-21 09:22:56 -08:00
ia64 vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
m32r vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
m68k vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
metag vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
microblaze vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
mips signal: fix information leak in copy_siginfo_from_user32 2015-08-16 20:51:42 -07:00
mn10300 vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
openrisc vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
parisc vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
powerpc signal: fix information leak in copy_siginfo_from_user32 2015-08-16 20:51:42 -07:00
s390 s390/sclp: clear upper register halves in _sclp_print_early 2015-08-10 12:20:29 -07:00
score vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
sh nosave: consolidate __nosave_{begin,end} in <asm/sections.h> 2015-05-06 21:56:28 +02:00
sparc sparc64: Fix userspace FPU register corruptions. 2015-08-16 20:51:38 -07:00
tile tile: use free_bootmem_late() for initrd 2015-08-10 12:20:30 -07:00
um vm: add VM_FAULT_SIGSEGV handling support 2015-04-29 10:34:00 +02:00
unicore32 nosave: consolidate __nosave_{begin,end} in <asm/sections.h> 2015-05-06 21:56:28 +02:00
x86 crypto: ghash-clmulni: specify context size for ghash async algorithm 2015-09-21 10:00:08 -07:00
xtensa xtensa: don't use echo -e needlessly 2015-09-21 10:00:10 -07:00
.gitignore
Kconfig microblaze: fix clone syscall 2013-08-20 08:43:02 -07:00