Thierry Reding a2f2f7403e drm/tegra: dc: Perform a complete reset sequence ... In order for the reset to be applied properly, the module clock must be enabled during the assertion. Signed-off-by: Thierry Reding <treding@nvidia.com>		2017-10-20 14:19:54 +02:00
..
drm	drm/tegra: dc: Perform a complete reset sequence	2017-10-20 14:19:54 +02:00
host1x	gpu: host1x: Fix incorrect comment for channel_request	2017-10-20 14:19:52 +02:00
ipu-v3	main drm pull request for 4.14 merge window	2017-09-03 17:02:26 -07:00
vga	sched/wait: Rename wait_queue_t => wait_queue_entry_t	2017-06-20 12:18:27 +02:00
Makefile