Wyon Bi 331690a183 drm/rockchip: dsi: fix pll clock setting for synopsys phy ... Change-Id: I4132fd04b1b0788d5a0db2f5c7b2831e204286c4 Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>		2018-12-24 14:10:17 +08:00
..
arm	MALI: utgard: RK: use '__GFP_ZERO | GFP_HIGHUSER' as 'flags' of alloc_page()	2018-11-15 14:14:07 +08:00
drm	drm/rockchip: dsi: fix pll clock setting for synopsys phy	2018-12-24 14:10:17 +08:00
host1x	gpu: host1x: fix error return code in host1x_probe()	2018-11-10 07:41:39 -08:00
ipu-v3	drm/imx: Match imx-ipuv3-crtc components using device node in platform data	2016-06-07 18:14:37 -07:00
rogue	rk: add SPDX license identifier to files with no license	2018-01-31 20:56:06 +08:00
rogue_m	rk: add SPDX license identifier to files with no license	2018-01-31 20:56:06 +08:00
vga	vgaarb: fix signal handling in vga_get()	2015-12-11 14:04:44 +10:00
Makefile	MALI: add midgard src dir	2016-03-09 16:51:03 +08:00