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* Introduce GPIO driver for Jasper Lake * Fix long standing bug in Sunrisepoint-H PAD locking code * Enable pin configuration setting for GPIO chip for Baytrail * Work around race condition in Cherriview hardware when handle IRQ * Clean up Cherryview code to be closer to other drivers The following is an automated git shortlog grouped by driver: baytrail: - Use platform_get_irq_optional() explicitly - Enable pin configuration setting for GPIO chip cannonlake: - Use generic flag for special GPIO base treatment cherryview: - Add missing spinlock usage in chv_gpio_irq_handler - Use GENMASK() consistently - Re-use data structures from pinctrl-intel.h (part 2) icelake: - Use generic flag for special GPIO base treatment intel: - Move npins closer to pin_base in struct intel_community - Update description in struct intel_community - Add Intel Jasper Lake pin controller support - Introduce new flag to force GPIO base to be 0 - Introduce common flags for GPIO mapping scheme lynxpoint: - Use platform_get_irq_optional() explicitly sunrisepoint: - Fix PAD lock register offset for SPT-H tigerlake: - Use generic flag for special GPIO base treatment -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEqaflIX74DDDzMJJtb7wzTHR8rCgFAl69IGoACgkQb7wzTHR8 rCjtqw/+MW/VhIuEOBdZ4zj5Q4ROyKGRmKgQLfu1yZ4gEUL+sLUHHgG8G6HPL400 pEP14bc2Xc2fOOaW8BVLN7J38O+gdb9/Rj+2kDwP3sGBlGieTQfWEBX3Y0BSVUf7 YfCs1yWsumakg7F30le9kNmHpf3WMl8uqXWK7P2tQ3a8Kyth/5wg44zP4IpdzRVv b3hy4gFw6tELO8Ja+ZdkORrM1bZYsnWrVX/Y0o6i2+gjG3bUhOPUdzLMTkkhPikJ ldHSyMkSvttdKznSMsrF4D7V2qeuK0BkcCF7YKFWFAlm68YrTOAy+sJ5zrtjiGRl 9TDCvTmJ/JQhWbGt3vUut+c7kuua2MbUxHGWxJDL0mKX3Pn8KVWZHHQQtZ4GPEy6 j83iO7ZPUcxxZkn+pI+aG05m99GEO+5r8XLct5KJCGXSRyCA8pXQ/aTsVWvJa8YV MzOyiruK6wrgXU+pSesZlPuLFou93GB3yfUlwalzIqjY+gtXbJpQ9d+qyo0m9Ghb wY8/RGnGDPrYM4LPYD33qLJ8nN42KiZNvVErB3huH6hDGQg2v/LPzQWQLCNyHcIJ YGnP7WfodMMt3ZgV9NEOPQ/xxCUAJZVbG2RmGEHGb7/8E/4OwpPgtIxBR516wUR4 LLT6fVKhH2hBIwsPy/GEm2afnFkPDBtDPYMITnMpDgu6eTRQZx8= =e+Dg -----END PGP SIGNATURE----- Merge tag 'intel-pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v5.8-1 * Introduce GPIO driver for Jasper Lake * Fix long standing bug in Sunrisepoint-H PAD locking code * Enable pin configuration setting for GPIO chip for Baytrail * Work around race condition in Cherriview hardware when handle IRQ * Clean up Cherryview code to be closer to other drivers The following is an automated git shortlog grouped by driver: baytrail: - Use platform_get_irq_optional() explicitly - Enable pin configuration setting for GPIO chip cannonlake: - Use generic flag for special GPIO base treatment cherryview: - Add missing spinlock usage in chv_gpio_irq_handler - Use GENMASK() consistently - Re-use data structures from pinctrl-intel.h (part 2) icelake: - Use generic flag for special GPIO base treatment intel: - Move npins closer to pin_base in struct intel_community - Update description in struct intel_community - Add Intel Jasper Lake pin controller support - Introduce new flag to force GPIO base to be 0 - Introduce common flags for GPIO mapping scheme lynxpoint: - Use platform_get_irq_optional() explicitly sunrisepoint: - Fix PAD lock register offset for SPT-H tigerlake: - Use generic flag for special GPIO base treatment |
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Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.