Colin Xu 8fe1056797 drm/i915/gvt: Set SNOOP for PAT3 on BXT/APL to workaround GPU BB hang ... If guest fills non-priv bb on ApolloLake/Broxton as Mesa i965 does in: 717e7539124d (i965: Use a WC map and memcpy for the batch instead of pw-) Due to the missing flush of bb filled by VM vCPU, host GPU hangs on executing these MI_BATCH_BUFFER. Temporarily workaround this by setting SNOOP bit for PAT3 used by PPGTT PML4 PTE: PAT(0) PCD(1) PWT(1). The performance is still expected to be low, will need further improvement. Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Colin Xu <colin.xu@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20201012045231.226748-1-colin.xu@intel.com		2020-10-19 16:54:11 +08:00
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drm	drm/i915/gvt: Set SNOOP for PAT3 on BXT/APL to workaround GPU BB hang	2020-10-19 16:54:11 +08:00
host1x	gpu: host1x: debug: Dump push buffer state	2020-07-17 16:06:14 +02:00
ipu-v3	treewide: Use fallthrough pseudo-keyword	2020-08-23 17:36:59 -05:00
trace
vga	vgaarb: mark vga_tryget static	2020-08-01 11:28:17 +02:00
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