Imre Deak 898e4e57ad drm/i915/icl: Disable DIP on MST ports with the transcoder clock still on ... According to BSpec the Data Island Packet should be disabled after disabling the transcoder, but before the transcoder clock select is set to none. On an ICL RVP, daisy-chained MST config not following this leads to a hang with the following MCE when disabling the output: [ 870.948739] mce: [Hardware Error]: CPU 0: Machine Check Exception: 5 Bank 6: ba00000011000402 [ 871.019212] mce: [Hardware Error]: RIP !INEXACT! 10:<ffffffff81aca652> {poll_idle+0x92/0xb0} [ 871.019212] mce: [Hardware Error]: TSC 135a261fe61 [ 871.019212] mce: [Hardware Error]: PROCESSOR 0:706e5 TIME 1591739604 SOCKET 0 APIC 0 microcode 20 [ 871.019212] mce: [Hardware Error]: Run the above through 'mcelog --ascii' [ 871.019212] mce: [Hardware Error]: Machine check: Processor context corrupt [ 871.019212] Kernel panic - not syncing: Fatal machine check [ 871.019212] Kernel Offset: disabled Bspec: 4287 Fixes: fa37a21327 ("drm/i915: Stop sending DP SDPs on ddi disable") Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200609220616.6015-1-imre.deak@intel.com (cherry picked from commit c980216dd2) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>		2020-06-16 11:34:24 +03:00
..
drm	drm/i915/icl: Disable DIP on MST ports with the transcoder clock still on	2020-06-16 11:34:24 +03:00
host1x	gpu: host1x: Use SMMU on Tegra124 and Tegra210	2020-04-28 11:44:07 +02:00
ipu-v3
trace	gpu/trace: add a gpu total memory usage tracepoint	2020-03-03 17:52:41 -05:00
vga
Makefile	gpu/trace: add a gpu total memory usage tracepoint	2020-03-03 17:52:41 -05:00