Rodrigo Vivi 85a12d7eb8 drm/i915/tgl: Fix Media power gate sequence. ... Some media power gates are disabled by default. commit 5d86923060 ("drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating") tried to enable it, but it duplicated an existent register. So, the main PG setup sequences ended up overwriting it. So, let's now merge this to the main PG setup sequence. v2: (Chris): s/BIT/REG_BIT, remove useless comment, remove useless =0, use the right gt, remove rc6 sequence doubt from commit message. Fixes: 5d86923060 ("drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating") Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: stable@vger.kernel.org#v5.5+ Cc: Dale B Stimson <dale.b.stimson@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20201111072859.1186070-1-rodrigo.vivi@intel.com (cherry picked from commit 695dc55b57) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>		2020-11-16 18:06:21 -05:00
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drm	drm/i915/tgl: Fix Media power gate sequence.	2020-11-16 18:06:21 -05:00
host1x	drm next for 5.10-rc1	2020-10-15 10:46:16 -07:00
ipu-v3	gpu: ipu-v3: remove unused functions	2020-10-26 10:42:38 +01:00
trace
vga	vgaarb: mark vga_tryget static	2020-08-01 11:28:17 +02:00
Makefile