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858ce2f56b
Add fwctl support code to allow sending of CXL feature commands from userspace through as ioctls via FWCTL. Provide initial setup bits. The CXL PCI probe function will call devm_cxl_setup_fwctl() after the cxl_memdev has been enumerated in order to setup FWCTL char device under the cxl_memdev like the existing memdev char device for issuing CXL raw mailbox commands from userspace via ioctls. Link: https://patch.msgid.link/r/20250307205648.1021626-2-dave.jiang@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Li Ming <ming.li@zohomail.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
200 lines
5.1 KiB
C
200 lines
5.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright(c) 2024-2025 Intel Corporation. */
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#ifndef __CXL_FEATURES_H__
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#define __CXL_FEATURES_H__
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#include <linux/uuid.h>
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#include <linux/fwctl.h>
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/* Feature UUIDs used by the kernel */
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#define CXL_FEAT_PATROL_SCRUB_UUID \
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UUID_INIT(0x96dad7d6, 0xfde8, 0x482b, 0xa7, 0x33, 0x75, 0x77, 0x4e, \
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0x06, 0xdb, 0x8a)
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#define CXL_FEAT_ECS_UUID \
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UUID_INIT(0xe5b13f22, 0x2328, 0x4a14, 0xb8, 0xba, 0xb9, 0x69, 0x1e, \
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0x89, 0x33, 0x86)
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#define CXL_FEAT_SPPR_UUID \
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UUID_INIT(0x892ba475, 0xfad8, 0x474e, 0x9d, 0x3e, 0x69, 0x2c, 0x91, \
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0x75, 0x68, 0xbb)
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#define CXL_FEAT_HPPR_UUID \
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UUID_INIT(0x80ea4521, 0x786f, 0x4127, 0xaf, 0xb1, 0xec, 0x74, 0x59, \
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0xfb, 0x0e, 0x24)
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#define CXL_FEAT_CACHELINE_SPARING_UUID \
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UUID_INIT(0x96C33386, 0x91dd, 0x44c7, 0x9e, 0xcb, 0xfd, 0xaf, 0x65, \
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0x03, 0xba, 0xc4)
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#define CXL_FEAT_ROW_SPARING_UUID \
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UUID_INIT(0x450ebf67, 0xb135, 0x4f97, 0xa4, 0x98, 0xc2, 0xd5, 0x7f, \
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0x27, 0x9b, 0xed)
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#define CXL_FEAT_BANK_SPARING_UUID \
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UUID_INIT(0x78b79636, 0x90ac, 0x4b64, 0xa4, 0xef, 0xfa, 0xac, 0x5d, \
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0x18, 0xa8, 0x63)
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#define CXL_FEAT_RANK_SPARING_UUID \
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UUID_INIT(0x34dbaff5, 0x0552, 0x4281, 0x8f, 0x76, 0xda, 0x0b, 0x5e, \
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0x7a, 0x76, 0xa7)
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/* Feature commands capability supported by a device */
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enum cxl_features_capability {
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CXL_FEATURES_NONE = 0,
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CXL_FEATURES_RO,
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CXL_FEATURES_RW,
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};
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/* Get Supported Features (0x500h) CXL r3.2 8.2.9.6.1 */
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struct cxl_mbox_get_sup_feats_in {
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__le32 count;
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__le16 start_idx;
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u8 reserved[2];
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} __packed;
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/* CXL spec r3.2 Table 8-87 command effects */
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#define CXL_CMD_CONFIG_CHANGE_COLD_RESET BIT(0)
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#define CXL_CMD_CONFIG_CHANGE_IMMEDIATE BIT(1)
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#define CXL_CMD_DATA_CHANGE_IMMEDIATE BIT(2)
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#define CXL_CMD_POLICY_CHANGE_IMMEDIATE BIT(3)
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#define CXL_CMD_LOG_CHANGE_IMMEDIATE BIT(4)
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#define CXL_CMD_SECURITY_STATE_CHANGE BIT(5)
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#define CXL_CMD_BACKGROUND BIT(6)
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#define CXL_CMD_BGCMD_ABORT_SUPPORTED BIT(7)
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#define CXL_CMD_EFFECTS_VALID BIT(9)
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#define CXL_CMD_CONFIG_CHANGE_CONV_RESET BIT(10)
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#define CXL_CMD_CONFIG_CHANGE_CXL_RESET BIT(11)
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/*
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* CXL spec r3.2 Table 8-109
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* Get Supported Features Supported Feature Entry
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*/
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struct cxl_feat_entry {
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uuid_t uuid;
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__le16 id;
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__le16 get_feat_size;
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__le16 set_feat_size;
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__le32 flags;
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u8 get_feat_ver;
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u8 set_feat_ver;
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__le16 effects;
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u8 reserved[18];
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} __packed;
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/* @flags field for 'struct cxl_feat_entry' */
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#define CXL_FEATURE_F_CHANGEABLE BIT(0)
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#define CXL_FEATURE_F_PERSIST_FW_UPDATE BIT(4)
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#define CXL_FEATURE_F_DEFAULT_SEL BIT(5)
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#define CXL_FEATURE_F_SAVED_SEL BIT(6)
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/*
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* CXL spec r3.2 Table 8-108
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* Get supported Features Output Payload
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*/
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struct cxl_mbox_get_sup_feats_out {
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__struct_group(cxl_mbox_get_sup_feats_out_hdr, hdr, /* no attrs */,
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__le16 num_entries;
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__le16 supported_feats;
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__u8 reserved[4];
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);
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struct cxl_feat_entry ents[] __counted_by_le(num_entries);
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} __packed;
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/*
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* Get Feature CXL spec r3.2 Spec 8.2.9.6.2
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*/
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/*
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* Get Feature input payload
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* CXL spec r3.2 section 8.2.9.6.2 Table 8-99
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*/
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struct cxl_mbox_get_feat_in {
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uuid_t uuid;
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__le16 offset;
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__le16 count;
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u8 selection;
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} __packed;
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/* Selection field for 'struct cxl_mbox_get_feat_in' */
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enum cxl_get_feat_selection {
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CXL_GET_FEAT_SEL_CURRENT_VALUE,
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CXL_GET_FEAT_SEL_DEFAULT_VALUE,
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CXL_GET_FEAT_SEL_SAVED_VALUE,
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CXL_GET_FEAT_SEL_MAX
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};
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/*
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* Set Feature CXL spec r3.2 8.2.9.6.3
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*/
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/*
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* Set Feature input payload
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* CXL spec r3.2 section 8.2.9.6.3 Table 8-101
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*/
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struct cxl_mbox_set_feat_in {
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__struct_group(cxl_mbox_set_feat_hdr, hdr, /* no attrs */,
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uuid_t uuid;
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__le32 flags;
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__le16 offset;
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u8 version;
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u8 rsvd[9];
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);
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__u8 feat_data[];
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} __packed;
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/* Set Feature flags field */
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enum cxl_set_feat_flag_data_transfer {
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CXL_SET_FEAT_FLAG_FULL_DATA_TRANSFER = 0,
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CXL_SET_FEAT_FLAG_INITIATE_DATA_TRANSFER,
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CXL_SET_FEAT_FLAG_CONTINUE_DATA_TRANSFER,
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CXL_SET_FEAT_FLAG_FINISH_DATA_TRANSFER,
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CXL_SET_FEAT_FLAG_ABORT_DATA_TRANSFER,
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CXL_SET_FEAT_FLAG_DATA_TRANSFER_MAX
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};
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#define CXL_SET_FEAT_FLAG_DATA_TRANSFER_MASK GENMASK(2, 0)
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#define CXL_SET_FEAT_FLAG_DATA_SAVED_ACROSS_RESET BIT(3)
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/**
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* struct cxl_features_state - The Features state for the device
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* @cxlds: Pointer to CXL device state
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* @entries: CXl feature entry context
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* @num_features: total Features supported by the device
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* @ent: Flex array of Feature detail entries from the device
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*/
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struct cxl_features_state {
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struct cxl_dev_state *cxlds;
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struct cxl_feat_entries {
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int num_features;
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int num_user_features;
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struct cxl_feat_entry ent[] __counted_by(num_features);
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} *entries;
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};
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struct cxl_mailbox;
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struct cxl_memdev;
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#ifdef CONFIG_CXL_FEATURES
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inline struct cxl_features_state *to_cxlfs(struct cxl_dev_state *cxlds);
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int devm_cxl_setup_features(struct cxl_dev_state *cxlds);
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int devm_cxl_setup_fwctl(struct cxl_memdev *cxlmd);
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#else
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static inline struct cxl_features_state *to_cxlfs(struct cxl_dev_state *cxlds)
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{
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return NULL;
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}
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static inline int devm_cxl_setup_features(struct cxl_dev_state *cxlds)
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{
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return -EOPNOTSUPP;
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}
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static inline int devm_cxl_setup_fwctl(struct cxl_memdev *cxlmd)
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{
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return -EOPNOTSUPP;
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}
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#endif
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#endif
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