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The dot clock divider is 7 bits wide, and the divider range is 1 ~ 127, or 6 ~ 127 if phase offsets are used. The 0 register value also represents a divider of 1 or bypass. Make the end condition of the for loop inclusive of 127 in the round_rate callback. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| sun4i_backend.c | ||
| sun4i_backend.h | ||
| sun4i_crtc.c | ||
| sun4i_crtc.h | ||
| sun4i_dotclock.c | ||
| sun4i_dotclock.h | ||
| sun4i_drv.c | ||
| sun4i_drv.h | ||
| sun4i_framebuffer.c | ||
| sun4i_framebuffer.h | ||
| sun4i_layer.c | ||
| sun4i_layer.h | ||
| sun4i_rgb.c | ||
| sun4i_rgb.h | ||
| sun4i_tcon.c | ||
| sun4i_tcon.h | ||
| sun4i_tv.c | ||
| sun6i_drc.c | ||