Maciej W. Rozycki 03dce59527 MIPS: Fix a preemption issue with thread's FPU defaults ... Fix "BUG: using smp_processor_id() in preemptible" reported in accesses to thread's FPU defaults: the value to initialise FSCR to at program startup, the FCSR r/w mask and the contents of FIR in full FPU emulation, removing a regression introduced with 9b26616c [MIPS: Respect the ISA level in FCSR handling] and f6843626 [MIPS: math-emu: Set FIR feature flags for full emulation]. Use `boot_cpu_data' to obtain the data from, following the approach that `cpu_has_*' macros take and avoiding the call to `smp_processor_id' made in the reference to `current_cpu_data'. The contents of FSCR have to be consistent across processors in an SMP system, the settings there must not change as a thread is migrated across processors. And the contents of FIR are guaranteed to be consistent in FPU emulation, by definition. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Tested-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Tested-by: Paul Martin <paul.martin@codethink.co.uk> Cc: Markos Chandras <Markos.Chandras@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10030/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2015-05-12 23:15:49 +02:00
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asm	MIPS: Fix a preemption issue with thread's FPU defaults	2015-05-12 23:15:49 +02:00
uapi/asm	MIPS: KVM: Expose MSA registers	2015-03-27 21:25:21 +00:00