mirror of
https://github.com/torvalds/linux.git
synced 2026-06-05 04:56:13 +02:00
some updates to the basic clk types to use determine_rate for the
divider type and add a power of two fractional divider flag though.
Otherwise, this is a collection of clk driver updates. More than half
the diffstat is in the Qualcomm clk driver where we add a bunch of data
to describe clks on various SoCs and fix bugs. The other big new thing
in here is the Mediatek MT8192 clk driver. That's been under review for
a while and it's nice to see that it's finally upstream.
Beyond that it's the usual set of minor fixes and tweaks to clk drivers.
There are some non-clk driver bits in here which have all been acked by
the respective maintainers.
New Drivers:
- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
- Multimedia clks (MMCC) on qcom MSM8994/MSM8992
- RPMh clks on qcom SM6350 SoCs
- Support for Mediatek MT8192 SoCs
- Add display (DU and DSI) clocks on Renesas R-Car V3U
- Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
resets on Renesas RZ/G2L
Updates:
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
- Add power of two flag to fractional divider clk type
- Migrate some clk drivers to clk_divider_ops.determine_rate
- Migrate to clk_parent_data in gcc-sdm660
- Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
- Switch from .round_rate to .determine_rate in clk-divider-gate
- Fix clock tree update for TF-A controlled clocks for all i.MX8M
- Add missing M7 core clock for i.MX8MN
- YAML conversion of rk3399 clock controller binding
- Removal of GRF dependency for the rk3328/rk3036 pll types
- Drop CLK_IS_CRITICAL flag from Tegra fuse clk
- Make CLK_R9A06G032 Kconfig symbol invisible
- Convert various DT bindings to YAML
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmExEooRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSXXBhAAvhHm4fcm3fRjNdfImd+jDEl8XSvg+w43
adSnmVxbYM6ZVNOiJ4CJWHbj0hOY/PJnsQYWbV0xXvXW+zXva6p495MMHHOGSi2o
lMgZVMvj5UAwu304ZC9Xfn31dwo8XdGrltp4JqIcI2NEBMh1/PlZW22esT+jDiWN
3SWFD3M7lu88xTREyiEu11FY3z/KiGzbGlqYcbivx1X0sHVnBRbl4qcqZway+BmQ
95Ma4YWwhvDGYc+ypKH2EPxs/LikHXj05nMooigy65DOQ5wrM4L1eWkwmVUf6h+e
t4x7sAVysLnkihzdH5r2pw6CcAIom76v8w0+maSfk+jINUu1LeGVuat1eXSesFTu
49o+uTKRghkUe/Qh6r+7lbo8AZXQq+wUsLTYRuaWT/mSb+svAtJaUWAru8tJnMlH
oK6OehcQwz4nGhH0HnBK1jCVdtgckxPBw8F/GYN9rYhsccIe0XmFjX1rzMM3s8De
PLl6QO7Xzd+xb/FwAU8+S1WpKFdPU6ILTUnI2Ma3Mn/gfjZEZHvWAdTjo4oZGEsw
+N4n924ArptbeSLRrlNUtqx4BVDL5yo54xS5gefNpmD5yezO7aoUtN0aGcBq+01p
Qw0N5hKtcdsNYLBEFSvBGcZZmErMZbPwMXHWiUwNymXBDzJKgj5d+ks+1vJ3iCNW
R5r9hvATJPQ=
=Rrqg
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Nothing changed in the clk framework core this time around. We did get
some updates to the basic clk types to use determine_rate for the
divider type and add a power of two fractional divider flag though.
Otherwise, this is a collection of clk driver updates. More than half
the diffstat is in the Qualcomm clk driver where we add a bunch of
data to describe clks on various SoCs and fix bugs. The other big new
thing in here is the Mediatek MT8192 clk driver. That's been under
review for a while and it's nice to see that it's finally upstream.
Beyond that it's the usual set of minor fixes and tweaks to clk
drivers. There are some non-clk driver bits in here which have all
been acked by the respective maintainers.
New Drivers:
- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
- Multimedia clks (MMCC) on qcom MSM8994/MSM8992
- RPMh clks on qcom SM6350 SoCs
- Support for Mediatek MT8192 SoCs
- Add display (DU and DSI) clocks on Renesas R-Car V3U
- Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
resets on Renesas RZ/G2L
Updates:
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
- Add power of two flag to fractional divider clk type
- Migrate some clk drivers to clk_divider_ops.determine_rate
- Migrate to clk_parent_data in gcc-sdm660
- Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
- Switch from .round_rate to .determine_rate in clk-divider-gate
- Fix clock tree update for TF-A controlled clocks for all i.MX8M
- Add missing M7 core clock for i.MX8MN
- YAML conversion of rk3399 clock controller binding
- Removal of GRF dependency for the rk3328/rk3036 pll types
- Drop CLK_IS_CRITICAL flag from Tegra fuse clk
- Make CLK_R9A06G032 Kconfig symbol invisible
- Convert various DT bindings to YAML"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
dt-bindings: clock: samsung: fix header path in example
clk: tegra: fix old-style declaration
clk: qcom: Add SM6350 GCC driver
MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos4 to dtschema
dt-bindings: clock: samsung: convert Exynos3250 to dtschema
dt-bindings: clock: samsung: convert Exynos542x to dtschema
dt-bindings: clock: samsung: add bindings for Exynos external clock
dt-bindings: clock: samsung: convert Exynos5250 to dtschema
clk: vc5: Add properties for configuring SD/OE behavior
clk: vc5: Use dev_err_probe
dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
clk: zynqmp: Fix kernel-doc format
clk: at91: clk-generated: Limit the requested rate to our range
clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
clk: zynqmp: Fix a memory leak
clk: zynqmp: Check the return type
...
|
||
|---|---|---|
| .. | ||
| actions | ||
| analogbits | ||
| at91 | ||
| axis | ||
| axs10x | ||
| baikal-t1 | ||
| bcm | ||
| berlin | ||
| davinci | ||
| h8300 | ||
| hisilicon | ||
| imgtec | ||
| imx | ||
| ingenic | ||
| keystone | ||
| loongson1 | ||
| mediatek | ||
| meson | ||
| microchip | ||
| mmp | ||
| mstar | ||
| mvebu | ||
| mxs | ||
| nxp | ||
| pistachio | ||
| pxa | ||
| qcom | ||
| ralink | ||
| renesas | ||
| rockchip | ||
| samsung | ||
| sifive | ||
| socfpga | ||
| spear | ||
| sprd | ||
| st | ||
| sunxi | ||
| sunxi-ng | ||
| tegra | ||
| ti | ||
| uniphier | ||
| ux500 | ||
| versatile | ||
| x86 | ||
| xilinx | ||
| zynq | ||
| zynqmp | ||
| clk-asm9260.c | ||
| clk-aspeed.c | ||
| clk-aspeed.h | ||
| clk-ast2600.c | ||
| clk-axi-clkgen.c | ||
| clk-axm5516.c | ||
| clk-bd718x7.c | ||
| clk-bm1880.c | ||
| clk-bulk.c | ||
| clk-cdce706.c | ||
| clk-cdce925.c | ||
| clk-clps711x.c | ||
| clk-composite.c | ||
| clk-conf.c | ||
| clk-cs2000-cp.c | ||
| clk-devres.c | ||
| clk-divider.c | ||
| clk-fixed-factor.c | ||
| clk-fixed-mmio.c | ||
| clk-fixed-rate.c | ||
| clk-fractional-divider.c | ||
| clk-fractional-divider.h | ||
| clk-fsl-flexspi.c | ||
| clk-fsl-sai.c | ||
| clk-gate.c | ||
| clk-gemini.c | ||
| clk-gpio.c | ||
| clk-hi655x.c | ||
| clk-highbank.c | ||
| clk-hsdk-pll.c | ||
| clk-k210.c | ||
| clk-lmk04832.c | ||
| clk-lochnagar.c | ||
| clk-max9485.c | ||
| clk-max77686.c | ||
| clk-milbeaut.c | ||
| clk-moxart.c | ||
| clk-multiplier.c | ||
| clk-mux.c | ||
| clk-nomadik.c | ||
| clk-npcm7xx.c | ||
| clk-nspire.c | ||
| clk-oxnas.c | ||
| clk-palmas.c | ||
| clk-plldig.c | ||
| clk-pwm.c | ||
| clk-qoriq.c | ||
| clk-rk808.c | ||
| clk-s2mps11.c | ||
| clk-scmi.c | ||
| clk-scpi.c | ||
| clk-si514.c | ||
| clk-si544.c | ||
| clk-si570.c | ||
| clk-si5341.c | ||
| clk-si5351.c | ||
| clk-si5351.h | ||
| clk-sparx5.c | ||
| clk-stm32f4.c | ||
| clk-stm32h7.c | ||
| clk-stm32mp1.c | ||
| clk-twl6040.c | ||
| clk-versaclock5.c | ||
| clk-vt8500.c | ||
| clk-wm831x.c | ||
| clk-xgene.c | ||
| clk.c | ||
| clk.h | ||
| clkdev.c | ||
| Kconfig | ||
| Makefile | ||