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As the scmi clk of npu may come from pvtpll, it should power up npu pd and enable the pclk of pvtpll before set scmi clk. The "assigned-clocks" in npu node will be set before npu driver probe, at this time the npu pd may be down, so add "rockchip,init-freq" in opp table node, make set scmi clk after npu pd is up and pclk of pvtpll is enabled. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Change-Id: I20fc3b6414601134645fa7f157c8ce5db9569232 |
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| acpi | ||
| asm-generic | ||
| clocksource | ||
| crypto | ||
| drm | ||
| dt-bindings | ||
| keys | ||
| kunit | ||
| kvm | ||
| linux | ||
| math-emu | ||
| media | ||
| memory | ||
| misc | ||
| net | ||
| pcmcia | ||
| ras | ||
| rdma | ||
| scsi | ||
| soc | ||
| sound | ||
| target | ||
| trace | ||
| uapi | ||
| vdso | ||
| video | ||
| xen | ||