Maxime Ripard 644df22fe3 drm/vc4: crtc: Deal with different number of pixel per clock ... Some of the HDMI pixelvalves in vc5 output two pixels per clock cycle. Let's put the number of pixel output per clock cycle in the CRTC data and update the various calculations to reflect that. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/18a3bb079981ba820132b37e736a4bb371234d2e.1599120059.git-series.maxime@cerno.tech		2020-09-07 18:02:14 +02:00
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drm	drm/vc4: crtc: Deal with different number of pixel per clock	2020-09-07 18:02:14 +02:00
host1x	gpu: host1x: debug: Dump push buffer state	2020-07-17 16:06:14 +02:00
ipu-v3	gpu: ipu-v3: image-convert: Wait for all EOFs before completing a tile	2020-07-20 15:16:05 +02:00
trace
vga	vgaarb: mark vga_tryget static	2020-08-01 11:28:17 +02:00
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