mirror of
https://github.com/torvalds/linux.git
synced 2026-11-13 13:38:14 +01:00
6301b17d60
Move the CMRR M/N register writes into a new intel_vrr_set_cmrr_timings() helper called from intel_vrr_set_fixed_rr_timings(), so CMRR is programmed together with the fixed rr timings for both the CMTG and CPU transcoder, instead of being open-coded in intel_vrr_set_transcoder_timings(). Drop the now-unused cmrr_enable argument to intel_vrr_tg_enable(). No functional change intended for non-CMRR configurations. --v2: - Commit message changes. - Added Simplified enable/disable sequence. (Chaitanya) --v3: - Guard CMRR enable condition (Chaitanya) - Comment changes updated (Chaitanya) - Squash register write commits together and avoid double writing issue. (Chaitanya) --v4: - Guard CMRR enable/disable with platform check --v5: - Update CMRR in enable/disable path --v6: - Simplify enable/disable calls (Chaitanya) - Make function usable for common cmtg and cpu transcoder (Chaitanya) --v7: - Update commit message (Chaitanya) Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Assisted-by: Claude:claude-opus-4-8 Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260730105919.3913412-9-mitulkumar.ajitkumar.golani@intel.com |
||
|---|---|---|
| .. | ||
| drm | ||
| host1x | ||
| ipu-v3 | ||
| nova-core | ||
| tests | ||
| trace | ||
| vga | ||
| buddy.c | ||
| Kconfig | ||
| Makefile | ||