Christian König 5d82730af7 drm/amdgpu: fix handling order in scheduler CS ... We need to clear parser.ibs and num_ibs before amd_sched_fence_create, otherwise the IB could be freed twice if fence creates fails. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>		2015-11-16 11:05:59 -05:00
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drm	drm/amdgpu: fix handling order in scheduler CS	2015-11-16 11:05:59 -05:00
host1x	gpu: host1x: Fix MLOCK's debug info	2015-10-02 14:40:12 +02:00
ipu-v3	imx-drm fixes and color format updates	2015-11-05 11:06:56 +10:00
vga	vga_switcheroo: Drop client power state VGA_SWITCHEROO_INIT	2015-11-05 11:07:36 +10:00
Makefile	gpu: host1x: Provide a proper struct bus_type	2015-01-27 10:09:14 +01:00