Tejun Heo 19df0c2fef percpu: align percpu readmostly subsection to cacheline ... Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>		2011-01-25 14:26:50 +01:00
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a.out-core.h
apic.h
arch_hweight.h
asm-offsets.h
auxvec.h
bugs.h
cache.h
checksum.h
common.lds.S	percpu: align percpu readmostly subsection to cacheline	2011-01-25 14:26:50 +01:00
cputime.h
current.h
delay.h
desc.h
device.h
dma.h
emergency-restart.h
fixmap.h
ftrace.h
futex.h
hardirq.h
hw_irq.h
io.h
irq_regs.h
irq_vectors.h
irq.h
irqflags.h
kdebug.h
kmap_types.h
mmu_context.h
mmu.h
mutex.h
page_offset.h
page.h
param.h
pci.h
pda.h
pgalloc.h
pgtable-2level.h
pgtable-3level.h
pgtable.h	mm: remove pte_*map_nested()	2010-10-26 16:52:08 -07:00
processor-generic.h
ptrace-generic.h	um: fix ptrace build error	2010-11-12 07:55:30 -08:00
required-features.h
sections.h
segment.h
setup.h
smp.h
system.h	um: fix IRQ flag handling naming	2010-10-26 16:52:05 -07:00
thread_info.h
timex.h
tlb.h
tlbflush.h
topology.h
uaccess.h
xor.h