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In order for the GCC votes on the GDSCs it provides to be propagated
to CX, CX needs to be declared as power domain of the GCC.
Document the missing power-domains property to that purpose.
Fixes: 95ba6820a6 ("dt-bindings: clock: qcom: document the Milos Global Clock Controller")
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260327-dt-fix-milos-eliza-gcc-power-domains-v1-1-f14a22c73fe9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
75 lines
1.9 KiB
YAML
75 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,milos-gcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller on Milos
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maintainers:
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- Luca Weiss <luca.weiss@fairphone.com>
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- Taniya Das <taniya.das@oss.qualcomm.com>
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description: |
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Qualcomm global clock control module provides the clocks, resets and power
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domains on Milos.
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See also:
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- include/dt-bindings/clock/qcom,eliza-gcc.h
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- include/dt-bindings/clock/qcom,milos-gcc.h
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properties:
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compatible:
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enum:
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- qcom,eliza-gcc
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- qcom,milos-gcc
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clocks:
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items:
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- description: Board XO source
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- description: Sleep clock source
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- description: PCIE 0 Pipe clock source
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- description: PCIE 1 Pipe clock source
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- description: UFS Phy Rx symbol 0 clock source
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- description: UFS Phy Rx symbol 1 clock source
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- description: UFS Phy Tx symbol 0 clock source
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- description: USB3 Phy wrapper pipe clock source
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power-domains:
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items:
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- description: CX domain
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required:
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- compatible
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- clocks
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- power-domains
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- '#power-domain-cells'
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/power/qcom,rpmhpd.h>
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clock-controller@100000 {
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compatible = "qcom,milos-gcc";
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reg = <0x00100000 0x1f4200>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&sleep_clk>,
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<&pcie0_phy>,
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<&pcie1_phy>,
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<&ufs_mem_phy 0>,
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<&ufs_mem_phy 1>,
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<&ufs_mem_phy 2>,
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<&usb_1_qmpphy>;
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power-domains = <&rpmhpd RPMHPD_CX>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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