Liang Chen 4ee45c385f soc: rockchip: rockchip_performance: optimize tasks schedule policy ... When level==0(low-performance mode): 1. prefer prev_cpu for rt tasks if prev cpu is fit. 2. make sure that it saves at least 6% of the energy when migrate tasks from little cpu to big cpu. When level==2(high-performance mode): 1. do not use EAS path. 2. select big cpu first when system is not overutilized. 3. do not trigger load_balance() when system is not overutilized. 4. prefer prev_cpu for rt tasks if prev cpu is fit. Test performance improvement for level==2: 1. CONFIG_ROCKCHIP_PERFORMANCE=n EMMC Random Write(4KB) 25.44MB/s Antutu: Total 581266 CPU 133023 GPU 234106 MEM 103602 UX 110535 2. CONFIG_ROCKCHIP_PERFORMANCE=y and level==2 EMMC Random Write(4KB) 44.19MB/s (73.7% improvement) Antutu: Total 600483 (3.3% improvement) CPU 134481 (1.1% improvement) GPU 234678 MEM 116551 (12.5% improvement) UX 114773 (3.8% improvement) Change-Id: I949ac229864eb12159b886b7769e0b489345bef4 Signed-off-by: Liang Chen <cl@rock-chips.com>		2022-05-26 09:57:09 +08:00
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arc	include/: replace HTTP links with HTTPS ones	2020-08-12 10:57:59 -07:00
at91	ARM: at91: add atmel tcb capabilities	2020-07-11 18:57:03 +02:00
bcm2835	firmware: raspberrypi: Keep count of all consumers	2021-09-15 09:50:41 +02:00
brcmstb
fsl	soc: fsl: qman: fix -Wpacked-not-aligned warnings	2020-09-22 17:38:21 -05:00
imx	ARM: imx: move cpu definitions into a header	2020-05-20 23:03:47 +08:00
mediatek	UPSTREAM: memory: mtk-smi: Allow building as module	2021-03-24 12:45:16 -07:00
mscc	net: dsa: felix: implement port flushing on .phylink_mac_link_down	2021-02-17 11:02:27 +01:00
nps	rk: revert to v4.19	2021-03-17 18:05:39 +08:00
qcom	It looks like a smaller batch of clk updates this time around. In the core	2020-08-07 13:35:51 -07:00
rockchip	soc: rockchip: rockchip_performance: optimize tasks schedule policy	2022-05-26 09:57:09 +08:00
sa1100
sifive	riscv: move sifive_l2_cache.h to include/soc	2020-01-12 10:12:44 -08:00
tegra	rk: revert to v4.19	2021-03-17 18:05:39 +08:00