Perry Yuan 48c19a95f1 drm/amd/pm: add GFXCLK/SCLK clocks level print support for APUs ... add support that allow the userspace tool like RGP to get the GFX clock value at runtime, the fix follow the old way to show the min/current/max clocks level for compatible consideration. === Test === $ cat /sys/class/drm/card0/device/pp_dpm_sclk 0: 200Mhz * 1: 1100Mhz 2: 1600Mhz then run stress test on one APU system. $ cat /sys/class/drm/card0/device/pp_dpm_sclk 0: 200Mhz 1: 1040Mhz * 2: 1600Mhz The current GFXCLK value is updated at runtime. BugLink: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5260 Reviewed-by: Huang Ray <Ray.Huang@amd.com> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-11-17 17:10:10 -05:00
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acp
amdgpu	drm/amdgpu: add error print when failing to add IP block(v2)	2021-11-17 17:09:18 -05:00
amdkfd	drm/amdkfd: replace asic_family with asic_type	2021-11-17 17:10:01 -05:00
display	drm/amd/display: log amdgpu_dm_atomic_check() failure cause	2021-11-17 16:58:11 -05:00
include	drm/amdkfd: remove kgd_dev declaration and initialization	2021-11-17 16:58:03 -05:00
pm	drm/amd/pm: add GFXCLK/SCLK clocks level print support for APUs	2021-11-17 17:10:10 -05:00