Masami Hiramatsu (Google) 4b626015e1 x86/insn: Stop decoding i64 instructions in x86-64 mode at opcode ... In commit 2e044911be ("x86/traps: Decode 0xEA instructions as #UD") FineIBT starts using 0xEA as an invalid instruction like UD2. But insn decoder always returns the length of "0xea" instruction as 7 because it does not check the (i64) superscript. The x86 instruction decoder should also decode 0xEA on x86-64 as a one-byte invalid instruction by decoding the "(i64)" superscript tag. This stops decoding instruction which has (i64) but does not have (o64) superscript in 64-bit mode at opcode and skips other fields. With this change, insn_decoder_test says 0xea is 1 byte length if x86-64 (-y option means 64-bit): $ printf "0:\tea\t\n" | insn_decoder_test -y -v insn_decoder_test: success: Decoded and checked 1 instructions Signed-off-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Peter Zijlstra <peterz@infradead.org> Link: https://lore.kernel.org/r/174580490000.388420.5225447607417115496.stgit@devnote2		2025-05-06 12:03:16 +02:00
..
inat.c	x86/insn: Add a __ignore_sync_check__ marker	2021-03-15 11:00:57 +01:00
insn.c	x86/insn: Stop decoding i64 instructions in x86-64 mode at opcode	2025-05-06 12:03:16 +02:00
memcpy_64.S	tools headers: Update the copy of x86's mem{cpy,set}_64.S used in 'perf bench'	2024-01-30 11:31:15 -03:00
memset_64.S	tools headers: Update the arch/x86/lib/memset_64.S copy with the kernel sources	2025-04-10 09:28:25 -07:00
x86-opcode-map.txt	x86/insn: Stop decoding i64 instructions in x86-64 mode at opcode	2025-05-06 12:03:16 +02:00