Paul Mundt 43bc61d86f sh: Add register alignment helpers for shared flushers. ... This plugs in some register alignment helpers for the shared flushers, allowing them to also be used on SH-5. The main rationale here is that in the SH-5 case we have a variable ABI, where the pointer size may not equal the register width. This register extension is taken care of by the SH-5 code already today, and is otherwise unused on the SH-4 code. This combines the two and allows us to kill off the SH-5 implementation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>		2009-08-15 01:57:36 +09:00
..
asm	sh: Add register alignment helpers for shared flushers.	2009-08-15 01:57:36 +09:00
cpu-common/cpu	sh: Allow SH-3 and SH-5 to use common headers.	2008-07-29 22:52:49 +09:00
cpu-sh2/cpu	SH2(A) cache update	2008-08-04 16:33:47 +09:00
cpu-sh2a/cpu	sh: Fix UBC setup and registers for SH2A	2009-05-09 00:09:21 +09:00
cpu-sh3/cpu	sh: Migrate from PG_mapped to PG_dcache_dirty.	2009-07-22 19:20:49 +09:00
cpu-sh4/cpu	sh: Migrate from PG_mapped to PG_dcache_dirty.	2009-07-22 19:20:49 +09:00
cpu-sh5/cpu	sh: Kill off unused SH-5 irq_describe cruft.	2009-05-07 18:17:20 +09:00
mach-common/mach	sh: Add support mtd mapping for highlander	2009-06-16 16:49:03 +09:00
mach-dreamcast/mach	sh: pci: Tidy up the dreamcast PCI support.	2009-04-20 20:22:05 +09:00
mach-landisk/mach
mach-se/mach	sh: ms7724se: Add sh_eth support	2009-06-26 16:24:02 +09:00
mach-sh03/mach