linux/drivers/gpu
James Zhu 3d4e5f211e drm/amdkfd: use iosys_map for CWSR buffer access
After moving TBA/TMA from GTT to VRAM for GFX9.4.2+ in commit
5088a1ba6d6d ("drm/amdkfd: move TBA/TMA from system to device memory"),
direct pointer dereferences to CWSR buffers became unsafe because VRAM
is accessed via MMIO (PCI BAR mappings).

Direct writes like 'tma[2] = enabled' and memcpy() can fail or
produce incorrect results on non-x86 architectures because:
- MMIO requires specific accessor functions (writeq/readq)
- Compiler optimizations may generate invalid instruction sequences
- No guarantee of proper memory barriers or atomic access

This patch converts CWSR buffer access to use struct iosys_map,
which automatically handles both system memory (GTT) and MMIO
(VRAM) correctly by:
- Using writeq/writel/memcpy_toio for MMIO regions
- Using WRITE_ONCE/memcpy for system memory
- Providing proper memory barriers and access guarantees

Changes:
- Replace void *cwsr_kaddr with struct iosys_map cwsr_map
- Detect MMIO vs system memory using TTM_BO_MAP_IOMEM_MASK
- Use iosys_map_wr() for writing trap handler addresses and flags
- Use iosys_map_memcpy_to() for copying CWSR ISA code

This ensures correct operation on all architectures while maintaining
backward compatibility with older GPUs and APUs that use GTT.

Assisted-by: Claude:Claude-Opus-4.6
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08 14:20:29 -04:00
..
drm drm/amdkfd: use iosys_map for CWSR buffer access 2026-07-08 14:20:29 -04:00
host1x gpu: host1x: Fix iommu_map_sgtable() return value check 2026-05-28 17:19:30 +02:00
ipu-v3
nova-core drm-next for 7.2-rc1 2026-06-17 10:21:00 +01:00
tests
trace
vga fbdev: Wrap fbcon updates from vga-switcheroo in helper 2026-06-09 16:00:11 +02:00
buddy.c gpu/buddy: Track per-order used blocks with a scoreboard 2026-05-29 13:44:01 +02:00
Kconfig
Makefile