Cong Yang d75f7c1bd8 drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP ... [ Upstream commit cea7008190 ] The refresh reported by modetest is 60.46Hz, and the actual measurement is 60.01Hz, which is outside the expected tolerance. Adjust hporch and pixel clock to fix it. After repair, modetest and actual measurement were all 60.01Hz. Modetest refresh = Pixel CLK/ htotal* vtotal, but measurement frame rate is HS->LP cycle time(Vblanking). Measured frame rate is not only affecte by Htotal/Vtotal/pixel clock, also affected by Lane-num/PixelBit/LineTime /DSI CLK. Assume that the DSI controller could not make the mode that we requested(presumably it's PLL couldn't generate the exact pixel clock?). If you use a different DSI controller, you may need to readjust these parameters. Now this panel looks like it's only used by me on the MTK platform, so let's change this set of parameters. Fixes: 1bc2ef065f ("drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel") Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20231120020109.3216343-1-yangcong5@huaqin.corp-partner.google.com Signed-off-by: Sasha Levin <sashal@kernel.org>		2023-12-03 07:33:04 +01:00
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drm	drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP	2023-12-03 07:33:04 +01:00
host1x	gpu: host1x: Correct allocated size for contexts	2023-11-20 11:59:12 +01:00
ipu-v3	drm for 6.6-rc1	2023-08-30 13:34:34 -07:00
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