Mario Kleiner 349666cfbe drm/amdgpu: Avoid overflows/divide-by-zero in latency_watermark calculations. ... commit e190ed1ea7 upstream. At dot clocks > approx. 250 Mhz, some of these calcs will overflow and cause miscalculation of latency watermarks, and for some overflows also divide-by-zero driver crash ("divide error: 0000 [#1] PREEMPT SMP" in "dce_v10_0_latency_watermark+0x12d/0x190"). This zero-divide happened, e.g., on AMD Tonga Pro under DCE-10, on a Displayport panel when trying to set a video mode of 2560x1440 at 165 Hz vrefresh with a dot clock of 635.540 Mhz. Refine calculations to avoid the overflows. Tested for DCE-10 with R9 380 Tonga + ASUS ROG PG279 panel. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2017-05-25 14:30:09 +02:00
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drm	drm/amdgpu: Avoid overflows/divide-by-zero in latency_watermark calculations.	2017-05-25 14:30:09 +02:00
host1x	gpu: host1x: Fix MLOCK's debug info	2015-10-02 14:40:12 +02:00
ipu-v3	drm/imx: Match imx-ipuv3-crtc components using device node in platform data	2016-06-07 18:14:37 -07:00
vga	vgaarb: fix signal handling in vga_get()	2015-12-11 14:04:44 +10:00
Makefile