Nicolas Pitre 1e904e1bf6 ARM: vexpress: introduce DCSCB support ... This adds basic CPU and cluster reset controls on RTSM for the A15x4-A7x4 model configuration using the Dual Cluster System Configuration Block (DCSCB). The cache coherency interconnect (CCI) is not handled yet. Signed-off-by: Nicolas Pitre <nico@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Pawel Moll <pawel.moll@arm.com>		2013-05-29 15:50:34 -04:00
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bindings	ARM: vexpress: introduce DCSCB support	2013-05-29 15:50:34 -04:00
00-INDEX	Documentation: add devicetree docs index file	2011-03-16 10:47:03 -07:00
booting-without-of.txt	sun.com documentation fixes	2013-02-21 17:22:20 -08:00
usage-model.txt	Documentation/devicetree: make semantic of initrd-end more explicit	2013-04-25 15:05:09 -05:00