linux/drivers/gpu/drm/amd/include
Darren Powell 2ea092e5d3 amdgpu/pm: Powerplay API for smu , changes to clock and profile mode functions
v3: updated to include new clocks vclk, dclk, od_vddgfx_offset, od_cclk
    Added forward declaration for function smu_force_smuclk_levels to resolve clash with other commits
    Resolved context clashes with other commits and v3 updates to patches 0003, 0004
v2: fix errors flagged by checkpatch

New Functions
  smu_bump_power_profile_mode() - changes profile mode assuming calling function already has mutex
  smu_force_ppclk_levels()      - accepts Powerplay enum pp_clock_type to specify clock to change
  smu_print_ppclk_levels()      - accepts Powerplay enum pp_clock_type to request clock levels
  amdgpu_get_pp_dpm_clock()     - accepts Powerplay enum pp_clock_type to request clock levels and allows
                                  all the amdgpu_get_pp_dpm_$CLK functions to have a single codepath
  amdgpu_set_pp_dpm_clock()     - accepts Powerplay enum pp_clock_type to set clock levels and allows
                                  all the amdgpu_set_pp_dpm_$CLK functions to have a single codepath

Modified Functions
  smu_force_smuclk_levels        - changed function name to make clear difference to smu_force_ppclk_levels
  smu_force_ppclk_levels()       - modifed signature to implement Powerplay API force_clock_level
                                 - calls smu_force_smuclk_levels
  smu_print_smuclk_levels        - changed function name to make clear difference to smu_print_ppclk_levels
  smu_print_ppclk_levels()       - modifed signature to implement Powerplay API force_clock_level
                                 - calls smu_print_smuclk_levels
  smu_sys_get_gpu_metrics        - modifed arg0 to match Powerplay API get_gpu_metrics
  smu_get_power_profile_mode     - modifed arg0 to match Powerplay API get_power_profile_mode
  smu_set_power_profile_mode     - modifed arg0 to match Powerplay API set_power_profile_mode
                                 - removed arg lock_needed, mutex always locked, internal functions
                                   can call smu_bump if they already hold lock
  smu_switch_power_profile       - now calls smu_bump as already holds mutex lock
  smu_adjust_power_state_dynamic - now calls smu_bump as already holds mutex lock
  amdgpu_get_pp_od_clk_voltage   - uses smu_print_ppclk_levels
  amdgpu_{set,get}_pp_dpm_$CLK   - replace logic with call helper function amdgpu_{set,get}_pp_dpm_clock()
                                   CLK ={sclk, mclk, socclk, fclk, dcefclk, pci, vclkd, dclk}

Other Changes
  added 5 smu Powerplay functions to swsmu_dpm_funcs
  removed special smu handling in pm functions and called through Powerplay API

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-26 17:18:07 -05:00
..
asic_reg drm/amdgpu: add SMUIO 11.0.6 register headers 2021-02-09 15:28:11 -05:00
ivsrcid drm/amdgpu: add sdma2 and sdma3 irqsrc header files for sienna_cichlid (v2) 2020-06-03 13:52:03 -04:00
amd_acpi.h
amd_pcie_helpers.h
amd_pcie.h drm/amdgpu:Add pcie gen5 support in pcie capability. 2021-01-21 09:54:56 -05:00
amd_shared.h drm/amd/pm: enable DCS 2021-02-09 15:27:57 -05:00
arct_ip_offset.h drm/amd/include/arct_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
atom-bits.h
atom-names.h
atom-types.h
atombios.h drm/amd/pm: correct VR shared rail info 2020-10-27 11:58:57 -04:00
atomfirmware.h drm/amdgpu: new macro for determining 2ND_USB20PORT support 2020-12-10 16:41:49 -05:00
atomfirmwareid.h
cgs_common.h drm/amdgpu: retire indirect mmio reg support from cgs 2020-04-09 10:43:18 -04:00
cik_structs.h
dimgrey_cavefish_ip_offset.h drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
discovery.h drm/amdgpu/discovery: reserve discovery data at the top of VRAM 2019-10-15 15:48:46 -04:00
displayobject.h
dm_pp_interface.h
kgd_kfd_interface.h drm next for 5.10-rc1 2020-10-15 10:46:16 -07:00
kgd_pp_interface.h amdgpu/pm: Powerplay API for smu , changes to clock and profile mode functions 2021-02-26 17:18:07 -05:00
navi10_enum.h drm/amdgpu: add navi10 enums header 2019-06-20 15:54:46 -05:00
navi10_ip_offset.h drm/amd/include/navi10_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi12_ip_offset.h drm/amd/include/navi12_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
navi14_ip_offset.h drm/amd/include/navi14_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
pptable.h
renoir_ip_offset.h drm/amd/include/renoir_ip_offset: Mark top-level IP_BASE as __maybe_unused 2021-01-14 13:20:20 -05:00
sienna_cichlid_ip_offset.h drm/amd/include/sienna_cichlid_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
soc15_hw_ip.h drm/amdgpu: add navi10 ip offset header 2019-06-20 15:54:53 -05:00
soc15_ih_clientid.h drm/amdgpu: correct SDMA3 IH clinet id for sienna_cichlid 2020-06-03 13:52:04 -04:00
v9_structs.h drm/amdkfd: Extend CU mask to 8 SEs (v3) 2019-08-02 10:19:11 -05:00
v10_structs.h drm/amdgpu: add v10 structs header (v2) 2019-06-20 21:16:37 -05:00
vangogh_ip_offset.h drm/amd/include/vangogh_ip_offset: Mark top-level IP_BASE as __maybe_unused 2020-11-24 12:09:53 -05:00
vega10_enum.h drm/amdgpu: Support new arcturus mtype 2019-09-13 17:35:48 -05:00
vega10_ip_offset.h drm/amd/include/vega10_ip_offset: Mark _BASE structs as __maybe_unused 2020-11-13 17:29:46 -05:00
vega20_ip_offset.h drm/amd/include/vega20_ip_offset: Mark top-level IP_BASE definition as __maybe_unused 2020-11-24 12:09:53 -05:00
vi_structs.h