Nicholas Susanto 2ce156482a drm/amd/display: Fix disable_otg_wa logic ... [Why] When switching to another HDMI mode, we are unnecesarilly disabling/enabling FIFO causing both HPO and DIG registers to be set at the same time when only HPO is supposed to be set. This can lead to a system hang the next time we change refresh rates as there are cases when we don't disable OTG/FIFO but FIFO is enabled when it isn't supposed to be. [How] Removing the enable/disable FIFO entirely. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Nicholas Susanto <nicholas.susanto@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2023-12-06 15:22:34 -05:00
..
amdgpu_dm	amd-drm-next-6.8-2023-12-01:	2023-12-05 12:11:41 +10:00
dc	drm/amd/display: Fix disable_otg_wa logic	2023-12-06 15:22:34 -05:00
dmub	drm/amd/display: Increase scratch buffer size	2023-12-06 15:22:33 -05:00
include	drm/amd/display: Add missing chips for HDCP	2023-11-17 09:30:50 -05:00
modules	drm/amd/display: Send PQ bit in AMD VSIF	2023-11-17 09:30:50 -05:00
Kconfig	drm/amd/display: Allow building DC with clang on RISC-V	2023-07-21 16:52:25 -04:00
Makefile	drm/amd/display: Refactor OPTC into component folder	2023-11-29 16:49:01 -05:00
TODO