mirror of
https://github.com/torvalds/linux.git
synced 2026-11-12 20:54:48 +01:00
DDI_CLK_VALFREQ is programmed with the port clock, which for DP is the symbol clock computed assuming 8b/10b encoding (link_rate / 10). For DP 128b/132b (UHBR) rates and for HDMI FRL the port clock needs to be modified. DDI_CLK_VALFREQ does not have any functional impact on H/w, it only records the frequency S/w intends to set. Use intel_ddi_link_symbol_clock() to write the correct DDI clock in kHz Fixes: |
||
|---|---|---|
| .. | ||
| drm | ||
| host1x | ||
| ipu-v3 | ||
| nova-core | ||
| tests | ||
| trace | ||
| vga | ||
| buddy.c | ||
| Kconfig | ||
| Makefile | ||