linux/arch/arm64/kvm/vgic
Carlos López 21f12496fd KVM: arm64: vgic: Mitigate potential LPI registration failure
Mitigate a potential failure when inserting a new LPI into the VGIC LPI
xarray.

When vgic_add_lpi() is preparing to register a new LPI, it pre-allocates
an xarray entry using xa_reserve_irq(), so that it can later perform the
insertion under the xarray lock without allocating.

However, since xa_reserve_irq() is called before acquiring such lock,
there is a potential race where xa_reserve_irq() observes a populated
entry, thus not performing the allocation, and another CPU removes that
entry before the xarray lock is grabbed to perform the insertion.

  CPU0 (Adding new LPI)                      CPU1 (Releasing LPI)
  =====================                      ===================
  vgic_add_lpi()
      /* Entry populated, does not allocate */
      xa_reserve_irq(.., intid, ..)
                                            vgic_release_deleted_lpis()
                                                xa_lock_irqsave()
                                                vgic_release_lpi_locked()
                          xarray node freed --> __xa_erase(.., intid)
                                                xa_unlock_irqrestore()
      xa_lock_irqsave()
      xa_load(.., intid) == NULL
      vgic_try_get_irq_ref(NULL) == false
      __xa_store(.., intid, irq, 0) <-- xarray node was freed, gfp=0
                                        cannot allocate, returns -ENOMEM

This can happen e.g. if the guest issues a DISCARD while the LPI is
still referenced from a vCPU's active-pending list (ap_list), and the
same INTID is re-mapped via MAPTI.

Mitigate this by passing GFP_NOWAIT to __xa_store(), so that the
allocation can happen under the lock in the rare case that this
condition is hit. Add __GFP_ACCOUNT as well to match xa_reserve_irq()'s
flags.

Reported-by: Sashiko <sashiko-bot@kernel.org>
Fixes: 1d6f83f60f ("KVM: arm64: vgic: Store LPIs in an xarray")
Signed-off-by: Carlos López <clopez@suse.de>
Link: https://patch.msgid.link/20260715105137.3973823-5-clopez@suse.de
Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-07-23 09:56:57 +01:00
..
trace.h KVM: arm64: Move virt/kvm/arm to arch/arm64 2020-05-16 15:03:59 +01:00
vgic-debug.c Convert 'alloc_obj' family to use the new default GFP_KERNEL argument 2026-02-21 17:09:51 -08:00
vgic-init.c KVM: arm64: vgic: Consolidate vgic_allocate_private_irqs_locked() 2026-05-22 10:04:49 +01:00
vgic-irqfd.c KVM: arm64: vgic-v2: Force vgic init on injection outside the run loop 2026-05-21 08:08:49 +01:00
vgic-its.c KVM: arm64: vgic: Mitigate potential LPI registration failure 2026-07-23 09:56:57 +01:00
vgic-kvm-device.c KVM: arm64: vgic-v5: Limit support to 64 PPIs 2026-05-22 10:04:49 +01:00
vgic-mmio-v2.c KVM: arm64: vgic: Fix IIDR revision field extracted from wrong value 2026-04-24 12:03:47 +01:00
vgic-mmio-v3.c KVM: arm64: vgic: Fix IIDR revision field extracted from wrong value 2026-04-24 12:03:47 +01:00
vgic-mmio.c KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore 2026-03-19 18:21:28 +00:00
vgic-mmio.h KVM: arm64: GICv2: Handle deactivation via GICV_DIR traps 2025-11-24 14:29:14 -08:00
vgic-v2.c KVM: arm64: vgic: Pick EOIcount deactivations from AP-list tail 2026-03-07 21:45:58 +00:00
vgic-v3-nested.c Merge branch kvm-arm64/misc-6.20 into kvmarm-master/next 2026-02-05 09:17:58 +00:00
vgic-v3.c KVM: arm64: vgic: Avoid double-deactivate of IRQs in the nested context 2026-07-21 11:19:00 +01:00
vgic-v4.c treewide: Replace kmalloc with kmalloc_obj for non-scalar types 2026-02-21 01:02:28 -08:00
vgic-v5.c KVM: arm64: vgic-v5: Atomically assign bits to PPI DVI bitmap 2026-05-23 15:07:41 +01:00
vgic.c KVM: arm64: vgic: Fix race between LPI release and re-registration 2026-07-23 09:56:57 +01:00
vgic.h KVM: arm64: vgic-v5: Add for_each_visible_v5_ppi() iterator 2026-05-22 10:04:49 +01:00