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Optimize performance of syncpoint interrupt handling by reading the status register in 64-bit chunks when possible, and skipping processing when the read value is zero. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patch.msgid.link/20250917-host1x-syncpt-irq-perf-v2-1-736ef69b1347@nvidia.com |
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| .. | ||
| cdma_hw.c | ||
| channel_hw.c | ||
| debug_hw_1x01.c | ||
| debug_hw_1x06.c | ||
| debug_hw.c | ||
| host1x01_hardware.h | ||
| host1x01.c | ||
| host1x01.h | ||
| host1x02_hardware.h | ||
| host1x02.c | ||
| host1x02.h | ||
| host1x04_hardware.h | ||
| host1x04.c | ||
| host1x04.h | ||
| host1x05_hardware.h | ||
| host1x05.c | ||
| host1x05.h | ||
| host1x06_hardware.h | ||
| host1x06.c | ||
| host1x06.h | ||
| host1x07_hardware.h | ||
| host1x07.c | ||
| host1x07.h | ||
| host1x08_hardware.h | ||
| host1x08.c | ||
| host1x08.h | ||
| hw_host1x01_channel.h | ||
| hw_host1x01_sync.h | ||
| hw_host1x01_uclass.h | ||
| hw_host1x02_channel.h | ||
| hw_host1x02_sync.h | ||
| hw_host1x02_uclass.h | ||
| hw_host1x04_channel.h | ||
| hw_host1x04_sync.h | ||
| hw_host1x04_uclass.h | ||
| hw_host1x05_channel.h | ||
| hw_host1x05_sync.h | ||
| hw_host1x05_uclass.h | ||
| hw_host1x06_channel.h | ||
| hw_host1x06_hypervisor.h | ||
| hw_host1x06_uclass.h | ||
| hw_host1x06_vm.h | ||
| hw_host1x07_channel.h | ||
| hw_host1x07_hypervisor.h | ||
| hw_host1x07_uclass.h | ||
| hw_host1x07_vm.h | ||
| hw_host1x08_channel.h | ||
| hw_host1x08_common.h | ||
| hw_host1x08_hypervisor.h | ||
| hw_host1x08_uclass.h | ||
| hw_host1x08_vm.h | ||
| intr_hw.c | ||
| opcodes.h | ||
| syncpt_hw.c | ||