linux/drivers/gpu
Nicholas Kazlauskas 1328e395fd drm/amd/display: Fix detection of aligned DMUB firmware meta info
[Why]
A built firmware binary may be aligned to 16-bytes with padding at the
end as necessary. In the case that padding was applied the meta info
will not be detected correctly and we won't be able to allocate the
appropriate firmware and tracebuffer sizes.

[How]
To maintain compatibility with already released firmware where this
occurs we need to try every meta offset from 0..15 inclusive.

Extract out the meta info checker into a helper function that's called
for each of these offsets and exit early when we've found it.

Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-11-17 16:58:06 -05:00
..
drm drm/amd/display: Fix detection of aligned DMUB firmware meta info 2021-11-17 16:58:06 -05:00
host1x gpu: host1x: Plug potential memory leak 2021-09-16 18:06:52 +02:00
ipu-v3 media: i.MX6: Support 16-bit BT.1120 video input 2021-10-19 08:08:38 +01:00
trace
vga vgaarb: don't pass a cookie to vga_client_register 2021-07-21 10:29:10 +02:00
Makefile