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5c2b050848
- Tree wide:
* Make nr_irqs static to the core code and provide accessor functions
to remove existing and prevent future aliasing problems with local
variables or function arguments of the same name.
- Core code:
* Prevent freeing an interrupt in the devres code which is not managed
by devres in the first place.
* Use seq_put_decimal_ull_width() for decimal values output in
/proc/interrupts which increases performance significantly as it
avoids parsing the format strings over and over.
* Optimize raising the timer and hrtimer soft interrupts by using the
'set bit only' variants instead of the combined version which checks
whether ksoftirqd should be woken up. The latter is a pointless
exercise as both soft interrupts are raised in the context of the
timer interrupt and therefore never wake up ksoftirqd.
* Delegate timer/hrtimer soft interrupt processing to a dedicated thread
on RT.
Timer and hrtimer soft interrupts are always processed in ksoftirqd
on RT enabled kernels. This can lead to high latencies when other
soft interrupts are delegated to ksoftirqd as well.
The separate thread allows to run them seperately under a RT
scheduling policy to reduce the latency overhead.
- Drivers:
* New drivers or extensions of existing drivers to support Renesas
RZ/V2H(P), Aspeed AST27XX, T-HEAD C900 and ATMEL sam9x7 interrupt
chips
* Support for multi-cluster GICs on MIPS.
MIPS CPUs can come with multiple CPU clusters, where each CPU cluster
has its own GIC (Generic Interrupt Controller). This requires to
access the GIC of a remote cluster through a redirect register block.
This is encapsulated into a set of helper functions to keep the
complexity out of the actual code paths which handle the GIC details.
* Support for encrypted guests in the ARM GICV3 ITS driver
The ITS page needs to be shared with the hypervisor and therefore
must be decrypted.
* Small cleanups and fixes all over the place
-----BEGIN PGP SIGNATURE-----
iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmc7ggcTHHRnbHhAbGlu
dXRyb25peC5kZQAKCRCmGPVMDXSYoaf7D/9G6FgJXx/60zqnpnOr9Yx0hxjaI47x
PFyCd3P05qyVMBYXfI99vrSKuVdMZXJ/fH5L83y+sOaTASyLTzg37igZycIDJzLI
FnHh/m/+UA8k2aIC5VUiNAjne2RLaTZiRN15uEHFVjByC5Y+YTlCNUE4BBhg5RfQ
hKmskeffWdtui3ou13CSNvbFn+pmqi4g6n1ysUuLhiwM2E5b1rZMprcCOnun/cGP
IdUQsODNWTTv9eqPJez985M6A1x2SCGNv7Z73h58B9N0pBRPEC1xnhUnCJ1sA0cJ
pnfde2C1lztEjYbwDngy0wgq0P6LINjQ5Ma2YY2F2hTMsXGJxGPDZm24/u5uR46x
N/gsOQMXqw6f5yvbiS7Asx9WzR6ry8rJl70QRgTyozz7xxJTaiNm2HqVFe2wc+et
Q/BzaKdhmUJj1GMZmqD2rrgwYeDcb4wWYNtwjM4PVHHxYlJVq0mEF1kLLS8YDyjf
HuGPVqtSkt3E0+Br3FKcv5ltUQP8clXbudc6L1u98YBfNK12hW8L+c3YSvIiFoYM
ZOAeANPM7VtQbP2Jg2q81Dd3CShImt5jqL2um+l8g7+mUE7l9gyuO/w/a5dQ57+b
kx7mHHIW2zCeHrkZZbRUYzI2BJfMCCOVN4Ax5OZxTLnLsL9VEehy8NM8QYT4TS8R
XmTOYW3U9XR3gw==
=JqxC
-----END PGP SIGNATURE-----
Merge tag 'irq-core-2024-11-18' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull interrupt subsystem updates from Thomas Gleixner:
"Tree wide:
- Make nr_irqs static to the core code and provide accessor functions
to remove existing and prevent future aliasing problems with local
variables or function arguments of the same name.
Core code:
- Prevent freeing an interrupt in the devres code which is not
managed by devres in the first place.
- Use seq_put_decimal_ull_width() for decimal values output in
/proc/interrupts which increases performance significantly as it
avoids parsing the format strings over and over.
- Optimize raising the timer and hrtimer soft interrupts by using the
'set bit only' variants instead of the combined version which
checks whether ksoftirqd should be woken up. The latter is a
pointless exercise as both soft interrupts are raised in the
context of the timer interrupt and therefore never wake up
ksoftirqd.
- Delegate timer/hrtimer soft interrupt processing to a dedicated
thread on RT.
Timer and hrtimer soft interrupts are always processed in ksoftirqd
on RT enabled kernels. This can lead to high latencies when other
soft interrupts are delegated to ksoftirqd as well.
The separate thread allows to run them seperately under a RT
scheduling policy to reduce the latency overhead.
Drivers:
- New drivers or extensions of existing drivers to support Renesas
RZ/V2H(P), Aspeed AST27XX, T-HEAD C900 and ATMEL sam9x7 interrupt
chips
- Support for multi-cluster GICs on MIPS.
MIPS CPUs can come with multiple CPU clusters, where each CPU
cluster has its own GIC (Generic Interrupt Controller). This
requires to access the GIC of a remote cluster through a redirect
register block.
This is encapsulated into a set of helper functions to keep the
complexity out of the actual code paths which handle the GIC
details.
- Support for encrypted guests in the ARM GICV3 ITS driver
The ITS page needs to be shared with the hypervisor and therefore
must be decrypted.
- Small cleanups and fixes all over the place"
* tag 'irq-core-2024-11-18' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (50 commits)
irqchip/riscv-aplic: Prevent crash when MSI domain is missing
genirq/proc: Use seq_put_decimal_ull_width() for decimal values
softirq: Use a dedicated thread for timer wakeups on PREEMPT_RT.
timers: Use __raise_softirq_irqoff() to raise the softirq.
hrtimer: Use __raise_softirq_irqoff() to raise the softirq
riscv: defconfig: Enable T-HEAD C900 ACLINT SSWI drivers
irqchip: Add T-HEAD C900 ACLINT SSWI driver
dt-bindings: interrupt-controller: Add T-HEAD C900 ACLINT SSWI device
irqchip/stm32mp-exti: Use of_property_present() for non-boolean properties
irqchip/mips-gic: Fix selection of GENERIC_IRQ_EFFECTIVE_AFF_MASK
irqchip/mips-gic: Prevent indirect access to clusters without CPU cores
irqchip/mips-gic: Multi-cluster support
irqchip/mips-gic: Setup defaults in each cluster
irqchip/mips-gic: Support multi-cluster in for_each_online_cpu_gic()
irqchip/mips-gic: Replace open coded online CPU iterations
genirq/irqdesc: Use str_enabled_disabled() helper in wakeup_show()
genirq/devres: Don't free interrupt which is not managed by devres
irqchip/gic-v3-its: Fix over allocation in itt_alloc_pool()
irqchip/aspeed-intc: Add AST27XX INTC support
dt-bindings: interrupt-controller: Add support for ASPEED AST27XX INTC
...
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|---|---|---|
| .. | ||
| abilis,tb10x-ictl.txt | ||
| actions,owl-sirq.yaml | ||
| al,alpine-msix.txt | ||
| allwinner,sun4i-a10-ic.yaml | ||
| allwinner,sun6i-a31-r-intc.yaml | ||
| allwinner,sun7i-a20-sc-nmi.yaml | ||
| amazon,al-fic.txt | ||
| amlogic,meson-gpio-intc.yaml | ||
| apple,aic.yaml | ||
| apple,aic2.yaml | ||
| arm,gic-v3.yaml | ||
| arm,gic.yaml | ||
| arm,nvic.txt | ||
| arm,versatile-fpga-irq.txt | ||
| arm,vic.yaml | ||
| aspeed,ast2xxx-scu-ic.txt | ||
| aspeed,ast2400-i2c-ic.txt | ||
| aspeed,ast2400-vic.yaml | ||
| aspeed,ast2700-intc.yaml | ||
| atmel,aic.yaml | ||
| brcm,bcm2835-armctrl-ic.txt | ||
| brcm,bcm2836-l1-intc.yaml | ||
| brcm,bcm6345-l1-intc.txt | ||
| brcm,bcm7038-l1-intc.yaml | ||
| brcm,bcm7120-l2-intc.yaml | ||
| brcm,l2-intc.yaml | ||
| cdns,xtensa-mx.txt | ||
| cdns,xtensa-pic.txt | ||
| cirrus,clps711x-intc.txt | ||
| csky,apb-intc.txt | ||
| csky,mpintc.txt | ||
| digicolor-ic.txt | ||
| ezchip,nps400-ic.txt | ||
| faraday,ftintc010.txt | ||
| fsl,intmux.yaml | ||
| fsl,irqsteer.yaml | ||
| fsl,ls-extirq.yaml | ||
| fsl,ls-msi.yaml | ||
| fsl,mu-msi.yaml | ||
| google,goldfish-pic.txt | ||
| hisilicon,mbigen-v2.txt | ||
| idt,32434-pic.yaml | ||
| img,pdc-intc.txt | ||
| ingenic,intc.yaml | ||
| intel,ce4100-ioapic.yaml | ||
| intel,ce4100-lapic.yaml | ||
| intel,ixp4xx-interrupt.yaml | ||
| interrupts.txt | ||
| jcore,aic.txt | ||
| kontron,sl28cpld-intc.yaml | ||
| loongson,cpu-interrupt-controller.yaml | ||
| loongson,eiointc.yaml | ||
| loongson,htpic.yaml | ||
| loongson,htvec.yaml | ||
| loongson,liointc.yaml | ||
| loongson,ls1x-intc.yaml | ||
| loongson,pch-msi.yaml | ||
| loongson,pch-pic.yaml | ||
| lsi,zevio-intc.txt | ||
| marvell,armada-8k-pic.txt | ||
| marvell,gicp.txt | ||
| marvell,icu.txt | ||
| marvell,mpic.yaml | ||
| marvell,odmi-controller.txt | ||
| marvell,orion-intc.txt | ||
| marvell,sei.txt | ||
| mediatek,mt6577-sysirq.yaml | ||
| mediatek,mtk-cirq.yaml | ||
| microchip,lan966x-oic.yaml | ||
| microchip,pic32-evic.txt | ||
| microchip,sama7g5-eic.yaml | ||
| mrvl,intc.yaml | ||
| mscc,ocelot-icpu-intr.yaml | ||
| msi-controller.yaml | ||
| msi.txt | ||
| mstar,mst-intc.yaml | ||
| mti,cpu-interrupt-controller.yaml | ||
| mti,gic.yaml | ||
| nuvoton,wpcm450-aic.yaml | ||
| nvidia,tegra20-ictlr.txt | ||
| nxp,lpc3220-mic.txt | ||
| open-pic.txt | ||
| opencores,or1k-pic.txt | ||
| openrisc,ompic.txt | ||
| qca,ath79-cpu-intc.txt | ||
| qca,ath79-misc-intc.txt | ||
| qcom,mpm.yaml | ||
| qcom,pdc.yaml | ||
| ralink,rt2880-intc.yaml | ||
| rda,8810pl-intc.yaml | ||
| realtek,rtl-intc.yaml | ||
| renesas,intc-irqpin.yaml | ||
| renesas,irqc.yaml | ||
| renesas,rza1-irqc.yaml | ||
| renesas,rzg2l-irqc.yaml | ||
| renesas,rzv2h-icu.yaml | ||
| riscv,aplic.yaml | ||
| riscv,cpu-intc.yaml | ||
| riscv,imsics.yaml | ||
| samsung,exynos4210-combiner.yaml | ||
| sifive,plic-1.0.0.yaml | ||
| snps,arc700-intc.txt | ||
| snps,archs-idu-intc.txt | ||
| snps,archs-intc.txt | ||
| snps,dw-apb-ictl.txt | ||
| socionext,synquacer-exiu.yaml | ||
| socionext,uniphier-aidet.yaml | ||
| st,spear3xx-shirq.txt | ||
| st,stih407-irq-syscfg.yaml | ||
| st,stm32-exti.yaml | ||
| starfive,jh8100-intc.yaml | ||
| sunplus,sp7021-intc.yaml | ||
| technologic,ts4800.txt | ||
| thead,c900-aclint-mswi.yaml | ||
| thead,c900-aclint-sswi.yaml | ||
| ti,cp-intc.txt | ||
| ti,keystone-irq.txt | ||
| ti,omap-intc-irq.txt | ||
| ti,omap2-intc.txt | ||
| ti,omap4-wugen-mpu | ||
| ti,pruss-intc.yaml | ||
| ti,sci-inta.yaml | ||
| ti,sci-intr.yaml | ||
| via,vt8500-intc.txt | ||