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d1fed2d600
Provide individual LPAE and non-LPAE definitions for both these functions, rather than having ifdefs inside the function body. This places the functions closer to their associated definitions. Reviewed-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
76 lines
1.6 KiB
C
76 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ARCH_ARM_FAULT_H
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#define __ARCH_ARM_FAULT_H
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/*
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* Fault status register encodings. We steal bit 31 for our own purposes.
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*/
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#define FSR_LNX_PF BIT(31)
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#define FSR_CM BIT(13)
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#define FSR_WRITE BIT(11)
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#ifdef CONFIG_ARM_LPAE
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#define FSR_FS_AEA 17
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#define FS_TRANS_NOLL 0x4
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#define FS_PERM_NOLL 0xC
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#define FS_MMU_NOLL_MASK 0x3C
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#define FSR_FS5_0 GENMASK(5, 0)
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static inline int fsr_fs(unsigned int fsr)
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{
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return fsr & FSR_FS5_0;
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}
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static inline bool is_translation_fault(unsigned int fsr)
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{
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int fs = fsr_fs(fsr);
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return (fs & FS_MMU_NOLL_MASK) == FS_TRANS_NOLL;
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}
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static inline bool is_permission_fault(unsigned int fsr)
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{
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int fs = fsr_fs(fsr);
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return (fs & FS_MMU_NOLL_MASK) == FS_PERM_NOLL;
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}
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#else
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#define FSR_FS_AEA 22
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#define FS_L1_TRANS 0x5
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#define FS_L2_TRANS 0x7
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#define FS_L1_PERM 0xD
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#define FS_L2_PERM 0xF
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#define FSR_FS4 BIT(10)
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#define FSR_FS3_0 GENMASK(3, 0)
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static inline int fsr_fs(unsigned int fsr)
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{
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return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
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}
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static inline bool is_translation_fault(unsigned int fsr)
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{
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int fs = fsr_fs(fsr);
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return fs == FS_L1_TRANS || fs == FS_L2_TRANS;
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}
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static inline bool is_permission_fault(unsigned int fsr)
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{
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int fs = fsr_fs(fsr);
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return fs == FS_L1_PERM || fs == FS_L2_PERM;
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}
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#endif
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void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
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void early_abt_enable(void);
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asmlinkage void do_DataAbort(unsigned long addr, unsigned int fsr,
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struct pt_regs *regs);
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asmlinkage void do_PrefetchAbort(unsigned long addr, unsigned int ifsr,
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struct pt_regs *regs);
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#endif /* __ARCH_ARM_FAULT_H */
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