Stephen Boyd 11f83102d8 Merge branches 'clk-vc5', 'clk-silabs', 'clk-aspeed', 'clk-qoriq' and 'clk-rohm' into clk-next ... - Support crystal load capacitance for Versaclock VC5 - Add a "skip recall" DT binding for Silicon Labs' si570 to avoid glitches at boot * clk-vc5: clk: vc5: Add support for optional load capacitance dt-bindings: clk: versaclock5: Add optional load capacitance property * clk-silabs: clk: si570: Skip NVM to RAM recall operation if an optional property is set dt-bindings: clock: si570: Add 'silabs,skip-recall' property * clk-aspeed: clk: aspeed: Fix APLL calculate formula from ast2600-A2 * clk-qoriq: clk: qoriq: use macros to generate pll_mask * clk-rohm: clk: BD718x7: Do not depend on parent driver data		2021-02-16 14:09:12 -08:00
..
bindings	Merge branches 'clk-vc5', 'clk-silabs', 'clk-aspeed', 'clk-qoriq' and 'clk-rohm' into clk-next	2021-02-16 14:09:12 -08:00
changesets.rst	docs: dt: convert changesets to ReST	2020-05-04 17:09:46 -05:00
dynamic-resolution-notes.rst	docs: dt: convert dynamic-resolution-notes.txt to ReST	2020-05-04 17:09:52 -05:00
index.rst	dt: Remove booting-without-of.rst	2020-10-13 13:33:16 -05:00
of_unittest.rst	docs: dt: convert of_unittest.txt to ReST	2020-05-04 17:09:52 -05:00
overlay-notes.rst	docs: dt: convert overlay-notes.txt to ReST format	2020-05-04 17:09:52 -05:00
usage-model.rst	docs: dt: usage_model.rst: fix link for DT usage	2020-05-04 16:22:54 -05:00
writing-schema.rst	dt: writing-schema: Miscellaneous grammar fixes	2020-08-19 14:21:04 -06:00