Joseph Gravenor 10bce710fa drm/amd/display: have two different sr and pstate latency tables for renoir ... [Why] new sr and pstate latencies are optimized for the case when we are not using lpddr4 memory [How] have two different wm tables, one for the lpddr case and one for non lpddr case Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-12-05 18:17:02 -05:00
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drm	drm/amd/display: have two different sr and pstate latency tables for renoir	2019-12-05 18:17:02 -05:00
host1x	gpu: host1x: Unconditionally select IOMMU_IOVA	2019-11-01 10:49:17 +01:00
ipu-v3
vga
Makefile