Aditya Swarup 106d4ffd6c drm/i915/tgl: Add definitions for VRR registers and bits ... Add definitions for registers grouped under Transcoder VRR function with necessary bitfields. Bspec: 49268 v2: Use REG_GENMASK, correct tabs/space indentation and move the definitions near the transcoder section.(Jani) v3: Remove unnecessary prefix from bit/mask definitions.(Manasi) v4: Use 'trans' in macro for better readability.(Manasi) Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200319015941.28008-1-aditya.swarup@intel.com		2020-03-27 16:30:24 -07:00
..
drm	drm/i915/tgl: Add definitions for VRR registers and bits	2020-03-27 16:30:24 -07:00
host1x	drm/tegra: Fixes for v5.6-rc1	2020-02-07 12:22:30 +10:00
ipu-v3
vga
Makefile