Jani Nikula 0ea917819d drm/i915/dsi: fix VBT send packet port selection for ICL+ ... The VBT send packet port selection was never updated for ICL+ where the 2nd link is on port B instead of port C as in VLV+ DSI. First, single link DSI needs to use the configured port instead of relying on the VBT sequence block port. Remove the hard-coded port C check here and make it generic. For reference, see commit f915084edc ("drm/i915: Changes related to the sequence port no for") for the original VLV specific fix. Second, the sequence block port number is either 0 or 1, where 1 indicates the 2nd link. Remove the hard-coded port C here for 2nd link. (This could be a "find second set bit" on DSI ports, but just check the two possible options.) Third, sanity check the result with a warning to avoid a NULL pointer dereference. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5984 Cc: stable@vger.kernel.org # v4.19+ Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220520094600.2066945-1-jani.nikula@intel.com (cherry picked from commit 08c59dde71)		2022-05-23 12:08:58 +03:00
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drm	drm/i915/dsi: fix VBT send packet port selection for ICL+	2022-05-23 12:08:58 +03:00
host1x	gpu: host1x: Fix a memory leak in 'host1x_remove()'	2022-03-01 11:13:09 +01:00
ipu-v3	drm/imx: various cleanups	2022-05-06 15:07:39 +10:00
trace
vga	PCI/VGA: Move vgaarb to drivers/pci	2022-03-09 18:30:46 -06:00
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