Wesley Chalmers 09c8cbedba drm/amd/display: Do not set drr on pipe commit ... [WHY] Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a pipe commit can cause underflow. [HOW] Move DMUB p-state delegate into optimze_bandwidth; enabling FAMS sets optimized_required. This change expects that Freesync requests are blocked when optimized_required is true. Fixes: 613a7956de ("drm/amd/display: Add monitor specific edid quirk") Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2023-07-07 13:51:48 -04:00
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drm	drm/amd/display: Do not set drr on pipe commit	2023-07-07 13:51:48 -04:00
host1x	drm/tegra: Changes for v6.4-rc1	2023-04-06 15:02:17 +02:00
ipu-v3	ipu-v3: Include <linux/io.h>	2023-05-18 11:06:18 +02:00
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