Matt Roper 2fc3ff76e9 drm/i915/gen11: Wa_1408615072/Wa_1407596294 should be on GT list ... commit d5a1224aa6 upstream. The UNSLICE_UNIT_LEVEL_CLKGATE register programmed by this workaround has 'BUS' style reset, indicating that it does not lose its value on engine resets. Furthermore, this register is part of the GT forcewake domain rather than the RENDER domain, so it should not be impacted by RCS engine resets. As such, we should implement this on the GT workaround list rather than an engine list. Bspec: 19219 Fixes: 3551ff9287 ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()") Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230201222831.608281-2-matthew.d.roper@intel.com (cherry picked from commit 5f21dc07b5) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2023-02-22 12:59:51 +01:00
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drm	drm/i915/gen11: Wa_1408615072/Wa_1407596294 should be on GT list	2023-02-22 12:59:51 +01:00
host1x	gpu: host1x: Avoid trying to use GART on Tegra20	2022-11-18 09:33:20 +01:00
ipu-v3
trace
vga
Makefile	gpu: host1x: Add context bus	2022-06-01 11:50:42 +02:00