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26f8453288
Use u64 instead of uint64_t to make the KVM selftests code more concise and more similar to the kernel (since selftests are primarily developed by kernel developers). This commit was generated with the following command: git ls-files tools/testing/selftests/kvm | xargs sed -i 's/uint64_t/u64/g' Then by manually adjusting whitespace to make checkpatch.pl happy. Include <linux/types.h> in include/kvm_util_types.h, iinclude/test_util.h, and include/x86/pmu.h to pick up the tools-defined u64. Arguably, all headers (especially kvm_util_types.h) should have already been including stdint.h to get uint64_t from the libc headers, but the missing dependency only rears its head once KVM uses u64 instead of uint64_t. No functional change intended. Signed-off-by: David Matlack <dmatlack@google.com> [sean: rename pread_uint64() => pread_u64, expand on types.h include] Link: https://patch.msgid.link/20260420212004.3938325-5-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
159 lines
4.6 KiB
C
159 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* KVM_SET_SREGS tests
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*
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* Copyright (C) 2018, Google LLC.
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*
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* This is a regression test for the bug fixed by the following commit:
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* d3802286fa0f ("kvm: x86: Disallow illegal IA32_APIC_BASE MSR values")
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*
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* That bug allowed a user-mode program that called the KVM_SET_SREGS
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* ioctl to put a VCPU's local APIC into an invalid state.
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*/
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/ioctl.h>
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#include "test_util.h"
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#include "kvm_util.h"
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#include "processor.h"
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#define TEST_INVALID_CR_BIT(vcpu, cr, orig, bit) \
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do { \
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struct kvm_sregs new; \
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int rc; \
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\
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/* Skip the sub-test, the feature/bit is supported. */ \
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if (orig.cr & bit) \
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break; \
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\
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memcpy(&new, &orig, sizeof(sregs)); \
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new.cr |= bit; \
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\
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rc = _vcpu_sregs_set(vcpu, &new); \
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TEST_ASSERT(rc, "KVM allowed invalid " #cr " bit (0x%lx)", bit); \
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\
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/* Sanity check that KVM didn't change anything. */ \
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vcpu_sregs_get(vcpu, &new); \
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TEST_ASSERT(!memcmp(&new, &orig, sizeof(new)), "KVM modified sregs"); \
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} while (0)
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#define KVM_ALWAYS_ALLOWED_CR4 (X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | \
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X86_CR4_DE | X86_CR4_PSE | X86_CR4_PAE | \
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X86_CR4_MCE | X86_CR4_PGE | X86_CR4_PCE | \
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X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT)
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static u64 calc_supported_cr4_feature_bits(void)
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{
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u64 cr4 = KVM_ALWAYS_ALLOWED_CR4;
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if (kvm_cpu_has(X86_FEATURE_UMIP))
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cr4 |= X86_CR4_UMIP;
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if (kvm_cpu_has(X86_FEATURE_LA57))
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cr4 |= X86_CR4_LA57;
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if (kvm_cpu_has(X86_FEATURE_VMX))
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cr4 |= X86_CR4_VMXE;
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if (kvm_cpu_has(X86_FEATURE_SMX))
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cr4 |= X86_CR4_SMXE;
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if (kvm_cpu_has(X86_FEATURE_FSGSBASE))
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cr4 |= X86_CR4_FSGSBASE;
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if (kvm_cpu_has(X86_FEATURE_PCID))
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cr4 |= X86_CR4_PCIDE;
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if (kvm_cpu_has(X86_FEATURE_XSAVE))
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cr4 |= X86_CR4_OSXSAVE;
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if (kvm_cpu_has(X86_FEATURE_SMEP))
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cr4 |= X86_CR4_SMEP;
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if (kvm_cpu_has(X86_FEATURE_SMAP))
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cr4 |= X86_CR4_SMAP;
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if (kvm_cpu_has(X86_FEATURE_PKU))
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cr4 |= X86_CR4_PKE;
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return cr4;
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}
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static void test_cr_bits(struct kvm_vcpu *vcpu, u64 cr4)
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{
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struct kvm_sregs sregs;
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int rc, i;
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vcpu_sregs_get(vcpu, &sregs);
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sregs.cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
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sregs.cr4 |= cr4;
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rc = _vcpu_sregs_set(vcpu, &sregs);
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TEST_ASSERT(!rc, "Failed to set supported CR4 bits (0x%lx)", cr4);
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TEST_ASSERT(!!(sregs.cr4 & X86_CR4_OSXSAVE) ==
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(vcpu->cpuid && vcpu_cpuid_has(vcpu, X86_FEATURE_OSXSAVE)),
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"KVM didn't %s OSXSAVE in CPUID as expected",
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(sregs.cr4 & X86_CR4_OSXSAVE) ? "set" : "clear");
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TEST_ASSERT(!!(sregs.cr4 & X86_CR4_PKE) ==
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(vcpu->cpuid && vcpu_cpuid_has(vcpu, X86_FEATURE_OSPKE)),
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"KVM didn't %s OSPKE in CPUID as expected",
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(sregs.cr4 & X86_CR4_PKE) ? "set" : "clear");
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vcpu_sregs_get(vcpu, &sregs);
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TEST_ASSERT(sregs.cr4 == cr4, "sregs.CR4 (0x%llx) != CR4 (0x%lx)",
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sregs.cr4, cr4);
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TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_UMIP);
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TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_LA57);
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TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_VMXE);
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TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_SMXE);
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TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_FSGSBASE);
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TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_PCIDE);
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TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_OSXSAVE);
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TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_SMEP);
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TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_SMAP);
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TEST_INVALID_CR_BIT(vcpu, cr4, sregs, X86_CR4_PKE);
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for (i = 32; i < 64; i++)
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TEST_INVALID_CR_BIT(vcpu, cr0, sregs, BIT(i));
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/* NW without CD is illegal, as is PG without PE. */
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TEST_INVALID_CR_BIT(vcpu, cr0, sregs, X86_CR0_NW);
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TEST_INVALID_CR_BIT(vcpu, cr0, sregs, X86_CR0_PG);
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}
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int main(int argc, char *argv[])
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{
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struct kvm_sregs sregs;
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struct kvm_vcpu *vcpu;
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struct kvm_vm *vm;
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int rc;
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/*
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* Create a dummy VM, specifically to avoid doing KVM_SET_CPUID2, and
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* use it to verify KVM enforces guest CPUID even if *userspace* never
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* sets CPUID.
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*/
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vm = vm_create_barebones();
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vcpu = __vm_vcpu_add(vm, 0);
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test_cr_bits(vcpu, KVM_ALWAYS_ALLOWED_CR4);
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kvm_vm_free(vm);
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/* Create a "real" VM with a fully populated guest CPUID and verify
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* APIC_BASE and all supported CR4 can be set.
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*/
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vm = vm_create_with_one_vcpu(&vcpu, NULL);
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vcpu_sregs_get(vcpu, &sregs);
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sregs.apic_base = 1 << 10;
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rc = _vcpu_sregs_set(vcpu, &sregs);
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TEST_ASSERT(rc, "Set IA32_APIC_BASE to %llx (invalid)",
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sregs.apic_base);
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sregs.apic_base = 1 << 11;
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rc = _vcpu_sregs_set(vcpu, &sregs);
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TEST_ASSERT(!rc, "Couldn't set IA32_APIC_BASE to %llx (valid)",
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sregs.apic_base);
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test_cr_bits(vcpu, calc_supported_cr4_feature_bits());
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kvm_vm_free(vm);
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return 0;
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}
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