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54ed919503
Add a test to verify that destination register of a 32-bit cmpxchg operating on an arena pointer is explicitly zero extended. W/o patch #1 this did not happen. Reported-by: Nicholas Carlini <npc@anthropic.com> Suggested-by: Nicholas Carlini <npc@anthropic.com> Signed-off-by: Eduard Zingerman <eddyz87@gmail.com> Link: https://lore.kernel.org/r/20260903171542.1438050-3-eddyz87@gmail.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
419 lines
9.4 KiB
C
419 lines
9.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/bpf.h>
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#include <bpf/bpf_helpers.h>
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#include "../../../include/linux/filter.h"
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#include <bpf_arena_common.h>
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#include <bpf/bpf_core_read.h>
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#include "bpf_misc.h"
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struct {
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__uint(type, BPF_MAP_TYPE_ARENA);
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__uint(map_flags, BPF_F_MMAPABLE | BPF_F_NO_USER_CONV);
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__uint(max_entries, 1);
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} arena SEC(".maps");
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extern long bpf_kfunc_call_test4(signed char a, short b, int c, long d) __ksym;
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/* to retain debug info for BTF generation */
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void __kfunc_btf_root(void)
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{
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bpf_kfunc_call_test4(0, 0, 0, 0);
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bpf_arena_alloc_pages(0, 0, 0, 0, 0);
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bpf_rdonly_cast(0, 0);
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}
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SEC("socket")
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__flag(BPF_F_TEST_STATE_FREQ)
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__flag(BPF_F_TEST_RND_HI32)
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__success __retval(0)
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__naked void zext_lost_across_checkpoint(void)
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{
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asm volatile (" \
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call %[bpf_ktime_get_ns]; \
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r8 = r0; \
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r6 = 0xdeadbeefcafebabe ll; /* inject some value for r6's upper half */ \
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if r8 != 0 goto 1f; /* fall-through cached first, branch pruned */ \
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r6 = 32; /* full 64-bit def */ \
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goto 2f; \
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1: w6 = 32; /* 32-bit def, zext mark lost */ \
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2: r0 = r6; /* buggy verifier believed upper 32 bits are 0 */ \
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/* and thus did not zero extended w6 = 32. */ \
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r0 >>= 32; \
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exit; \
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" :
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: __imm(bpf_ktime_get_ns)
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: __clobber_all);
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}
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/* 32-bit ALU result read as 64-bit -> zext */
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SEC("socket")
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__success __log_level(2)
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__msg("w1 = w0{{ +}}; zext")
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__naked void zext_alu32_hi_used(void)
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{
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asm volatile (" \
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call %[bpf_get_prandom_u32]; \
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w1 = w0; \
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r0 = r1; \
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exit; \
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" :
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: __imm(bpf_get_prandom_u32)
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: __clobber_all);
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}
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/* 32-bit ALU result read only as 32-bit -> no zext */
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SEC("socket")
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__success __log_level(2)
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__not_msg("; zext")
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__naked void no_zext_alu32_hi_unused(void)
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{
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asm volatile (" \
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call %[bpf_get_prandom_u32]; \
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w1 = w0; /* MOV */ \
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w2 = w1; \
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w2 += w1; /* ALU32, BPF_X */ \
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w2 += 1; /* ALU32, BPF_K */ \
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w2 = w2; /* keep w2 alive for previous instruction */ \
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r0 = 0; \
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exit; \
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" :
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: __imm(bpf_get_prandom_u32)
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: __clobber_all);
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}
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/* 64-bit definition is never zero extended */
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SEC("socket")
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__success __log_level(2)
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__not_msg("r1 = r0{{.*}}; zext")
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__naked void no_zext_mov64(void)
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{
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asm volatile (" \
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call %[bpf_get_prandom_u32]; \
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r1 = r0; \
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r0 = r1; \
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exit; \
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" :
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: __imm(bpf_get_prandom_u32)
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: __clobber_all);
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}
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/* Narrow load result read as 64-bit -> zext */
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SEC("socket")
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__success __log_level(2)
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__msg("r1 = *(u32 *)(r10 -8){{ +}}; zext")
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__naked void zext_narrow_load_hi_used(void)
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{
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asm volatile (" \
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r0 = 0; \
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*(u64 *)(r10 - 8) = r0; \
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r1 = *(u32 *)(r10 - 8); \
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r0 = r1; \
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exit; \
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" ::: __clobber_all);
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}
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/* 32-bit atomic fetch result read as 64-bit -> zext */
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SEC("socket")
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__success __log_level(2)
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__msg("r1 = atomic_fetch_add((u32 *)(r10 -8), r1){{ +}}; zext")
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__naked void zext_atomic_fetch32_hi_used(void)
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{
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asm volatile (" \
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r1 = 0; \
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*(u64 *)(r10 - 8) = r1; \
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w1 = 1; \
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.8byte %[fetch_add32]; \
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r0 = r1; \
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exit; \
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" :
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: __imm_insn(fetch_add32,
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BPF_ATOMIC_OP(BPF_W, BPF_ADD | BPF_FETCH, BPF_REG_10, BPF_REG_1, -8))
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: __clobber_all);
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}
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/* 32-bit atomic cmpxchg result (r0) read as 64-bit -> zext */
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SEC("socket")
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__success __log_level(2)
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__msg("r0 = atomic_cmpxchg((u32 *)(r10 -8), r0, r1){{ +}}; zext")
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__naked void zext_cmpxchg32_hi_used(void)
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{
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asm volatile (" \
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r1 = 0; \
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*(u64 *)(r10 - 8) = r1; \
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w0 = 0; \
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w1 = 1; \
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.8byte %[cmpxchg32]; \
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r2 = r0; \
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r0 = r2; \
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exit; \
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" :
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: __imm_insn(cmpxchg32,
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BPF_ATOMIC_OP(BPF_W, BPF_CMPXCHG, BPF_REG_10, BPF_REG_1, -8))
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: __clobber_all);
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}
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/* 32-bit def before a branch, upper half used on one branch -> zext */
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SEC("socket")
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__success __log_level(2)
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__msg("w6 = 32{{ +}}; zext")
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__naked void zext_cfg_hi_used_one_branch(void)
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{
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asm volatile (" \
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call %[bpf_get_prandom_u32]; \
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w6 = 32; \
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if r0 == 0 goto 1f; \
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r0 = r6; \
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exit; \
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1: r0 = 0; \
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exit; \
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" :
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: __imm(bpf_get_prandom_u32)
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: __clobber_all);
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}
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/* r1's upper half is dead, so 'w1 = 1' must NOT be marked for zero extension. */
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SEC("socket")
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__success __log_level(2)
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__not_msg("w1 = 1{{.*}}; zext")
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__naked void no_zext_other_reg_hi_used(void)
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{
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asm volatile (" \
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call %[bpf_get_prandom_u32]; \
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r6 = r0; \
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r6 <<= 32; \
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w1 = 1; \
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r0 = r6; \
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exit; \
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" :
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: __imm(bpf_get_prandom_u32)
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: __clobber_all);
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}
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/* LD_ABS defines r0; when r0 is read as 64-bit it must be zero extended */
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SEC("socket")
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__success __log_level(2)
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__msg("r0 = *(u8 *)skb[0]{{.*}}; zext")
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__naked void zext_ld_abs_hi_used(void)
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{
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asm volatile (" \
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r6 = r1; \
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r0 = *(u8 *)skb[0]; \
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r7 = r0; \
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r0 = r7; \
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exit; \
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" ::: __clobber_all);
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}
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/* Helper parameters are read as 64-bit (call_use_mask() fallback) */
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SEC("socket")
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__success __log_level(2)
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__msg("w2 = 1{{ +}}; zext")
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__naked void helper_param_read_as_64bit(void)
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{
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asm volatile (" \
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r1 = r10; \
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r1 += -8; \
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w2 = 1; \
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call %[bpf_trace_printk]; \
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r0 = 0; \
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exit; \
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" :
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: __imm(bpf_trace_printk)
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: __clobber_all);
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}
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static __used __naked int subprog_reads_arg_as_64bit(void)
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{
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asm volatile (" \
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r0 = r1; \
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exit; \
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" ::: __clobber_all);
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}
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/* subprogram parameters are conservatively read as 64-bit */
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SEC("socket")
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__success __log_level(2)
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__msg("w1 = w0{{ +}}; zext")
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__naked void subprog_param_read_as_64bit(void)
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{
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asm volatile (" \
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call %[bpf_get_prandom_u32]; \
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w1 = w0; \
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call subprog_reads_arg_as_64bit; \
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r0 = 0; \
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exit; \
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" :
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: __imm(bpf_get_prandom_u32)
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: __clobber_all);
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}
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/* kfunc parameters are zero extended */
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SEC("tc")
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__success __log_level(2)
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__msg("w1 = 1{{ +}}; zext")
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__msg("w2 = 1{{ +}}; zext")
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__msg("w3 = 1{{ +}}; zext")
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__msg("w4 = 1{{ +}}; zext")
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__naked void kfunc_param_read_per_btf(void)
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{
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asm volatile (" \
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w1 = 1; \
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w2 = 1; \
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w3 = 1; \
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w4 = 1; \
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call bpf_kfunc_call_test4; \
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r0 = 0; \
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exit; \
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" ::: __clobber_all);
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}
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SEC("socket")
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__success __log_level(2)
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__not_msg("; zext")
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__naked void alu32_and_32bit_conditional(void)
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{
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asm volatile (" \
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call %[bpf_get_prandom_u32]; \
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w1 = w0; \
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if w1 > 42 goto 1f; /* BPF_K */ \
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w2 = 28; \
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if w2 > w1 goto 1f; /* BPF_X */ \
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r0 = 0; \
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1: exit; \
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" :
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: __imm(bpf_get_prandom_u32)
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: __clobber_all);
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}
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SEC("socket")
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__success __log_level(2)
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__msg("w1 = w0{{ +}}; zext")
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__naked void alu32_and_64bit_conditional(void)
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{
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asm volatile (" \
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call %[bpf_get_prandom_u32]; \
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w1 = w0; \
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if r1 > 42 goto 1f; /* BPF_K */ \
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r2 = 28; \
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if r2 > r1 goto 1f; /* BPF_X */ \
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r0 = 0; \
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1: exit; \
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" :
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: __imm(bpf_get_prandom_u32)
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: __clobber_all);
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}
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SEC("socket")
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__success __log_level(2)
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__not_msg("; zext")
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__naked void alu64_and_conditionals(void)
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{
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asm volatile (" \
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call %[bpf_get_prandom_u32]; \
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r1 = r0; \
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if w1 > 42 goto 1f; /* BPF_K */ \
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if r1 > 42 goto 1f; /* BPF_K */ \
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r2 = 28; \
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if w2 > w1 goto 1f; /* BPF_X */ \
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if r2 > r1 goto 1f; /* BPF_X */ \
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r0 = 0; \
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1: exit; \
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" :
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: __imm(bpf_get_prandom_u32)
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: __clobber_all);
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}
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#ifdef __BPF_FEATURE_ADDR_SPACE_CAST
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SEC("?fentry.s/" SYS_PREFIX "sys_getpgid")
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__arch_s390x
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__xlated("7: w1 = w0")
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__xlated("8: w1 = w1")
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__xlated("9: w1 += 8")
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__xlated("10: w1 = w1")
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__xlated("11: w2 = w1")
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__xlated("12: w2 = w2")
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__xlated("13: *(u64 *)(r1 +0) = r2")
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__naked void arena_ptr(void)
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{
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asm volatile (" \
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r1 = %[arena] ll; \
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r2 = 0; \
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r3 = 1; \
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r4 = 0; \
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r5 = 0; \
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call %[bpf_arena_alloc_pages]; \
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r1 = addr_space_cast(r0, 0, 1); /* needs zext */ \
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r1 += 8; /* needs zext */ \
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r2 = addr_space_cast(r1, 1, 0); /* needs zext because of BPF_F_NO_USER_CONV */ \
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*(u64 *)(r1 +0) = r2; \
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r0 = 0; \
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exit; \
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" :
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: __imm(bpf_arena_alloc_pages),
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__imm_addr(arena)
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: __clobber_all);
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}
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/*
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* Result of a 32-bit cmpxchg is always explicitly zero extended.
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* Check that this holds for arenas (BPF_PROBE_ATOMIC instruction flavor).
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*/
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SEC("socket")
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__success
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__xlated("probe r0 = atomic_cmpxchg((u32 *)(r1 +0), r0, r2)")
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__xlated("w0 = w0")
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__naked void zext_arena_cmpxchg32(void)
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{
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asm volatile (" \
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r9 = %[arena] ll; /* associate the arena with the program */ \
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r1 = 0; \
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r1 = addr_space_cast(r1, 0, 1); \
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r0 = 0; \
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r2 = 0; \
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.8byte %[cmpxchg32]; \
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r0 >>= 32; /* make the upper half live */ \
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exit; \
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" :
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: __imm_addr(arena),
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__imm_insn(cmpxchg32,
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BPF_ATOMIC_OP(BPF_W, BPF_CMPXCHG, BPF_REG_1, BPF_REG_2, 0))
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: __clobber_all);
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}
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#endif
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/* Check if probe mem loads keep their zero extension. */
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SEC("socket")
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__success __log_level(2)
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__arch_s390x
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__xlated("3: r1 = *(u64 *)(r0 +0)")
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__xlated("4: r2 = *(u32 *)(r0 +0)")
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__xlated("5: w2 = w2")
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__xlated("6: r3 = *(u16 *)(r0 +0)")
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__xlated("7: w3 = w3")
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__xlated("8: r4 = *(u8 *)(r0 +0)")
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__xlated("9: w4 = w4")
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__naked void probe_mem(void)
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{
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asm volatile (" \
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r1 = 0; \
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r2 = 0; \
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call %[bpf_rdonly_cast]; \
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r1 = *(u64 *)(r0 + 0); /* BPF_PROBE_MEM */ \
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r2 = *(u32 *)(r0 + 0); /* BPF_PROBE_MEM */ \
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r3 = *(u16 *)(r0 + 0); /* BPF_PROBE_MEM */ \
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r4 = *(u8 *)(r0 + 0); /* BPF_PROBE_MEM */ \
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r0 = r1; /* make the registers used */ \
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r0 += r2; \
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r0 += r3; \
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r0 += r4; \
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1: exit; \
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" :
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: __imm(bpf_rdonly_cast)
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: __clobber_all);
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}
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char _license[] SEC("license") = "GPL";
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