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b1d6bd5462
The A64_MOV macro unconditionally uses ADD Rd, Rn, #0 to implement register moves. While functionally correct, this is not the canonical encoding when both operands are general-purpose registers. On AArch64, MOV has two aliases depending on the operand registers: - MOV <Xd|SP>, <Xn|SP> → ADD <Xd|SP>, <Xn|SP>, #0 - MOV <Xd>, <Xn> → ORR <Xd>, XZR, <Xn> The ADD form is required when the stack pointer is involved (as ORR does not accept SP), while the ORR form is the preferred encoding for general-purpose registers. The ORR encoding is also measurably faster on modern microarchitectures. A microbenchmark [1] comparing dependent chains of MOV (ORR) vs ADD #0 on an ARM Neoverse-V2 (72-core, 3.4 GHz) shows: === mov (ORR Xd, XZR, Xn) === run1 cycles/op=0.749859456 run2 cycles/op=0.749991250 run3 cycles/op=0.749601847 avg cycles/op=0.749817518 === add0 (ADD Xd, Xn, #0) === run1 cycles/op=1.004777689 run2 cycles/op=1.004558266 run3 cycles/op=1.004806559 avg cycles/op=1.004714171 The ORR form completes in ~0.75 cycles/op vs ~1.00 cycles/op for ADD #0, a ~25% improvement. This is likely because the CPU's register renaming hardware can eliminate ORR-based moves, while ADD #0 must go through the ALU pipeline. Update A64_MOV to select the appropriate encoding at JIT time: use ADD when either register is A64_SP, and ORR (via aarch64_insn_gen_move_reg()) otherwise. Update verifier_private_stack selftests to expect "mov x7, x0" instead of "add x7, x0, #0x0" in the JITed instruction checks, matching the new ORR-based encoding. [1] https://github.com/puranjaymohan/scripts/blob/main/arm64/bench/run_mov_vs_add0.sh Signed-off-by: Puranjay Mohan <puranjay@kernel.org> Acked-by: Xu Kuohai <xukuohai@huawei.com> Link: https://lore.kernel.org/r/20260225134339.2723288-1-puranjay@kernel.org Signed-off-by: Alexei Starovoitov <ast@kernel.org>
360 lines
7.8 KiB
C
360 lines
7.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <vmlinux.h>
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#include <bpf/bpf_helpers.h>
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#include "bpf_misc.h"
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#include "bpf_experimental.h"
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/* From include/linux/filter.h */
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#define MAX_BPF_STACK 512
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#if defined(__TARGET_ARCH_x86) || defined(__TARGET_ARCH_arm64)
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struct elem {
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struct bpf_timer t;
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char pad[256];
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};
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struct {
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__uint(type, BPF_MAP_TYPE_ARRAY);
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__uint(max_entries, 1);
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__type(key, int);
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__type(value, struct elem);
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} array SEC(".maps");
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SEC("kprobe")
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__description("Private stack, single prog")
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__success
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__arch_x86_64
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__jited(" movabsq $0x{{.*}}, %r9")
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__jited(" addq %gs:{{.*}}, %r9")
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__jited(" movl $0x2a, %edi")
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__jited(" movq %rdi, -0x100(%r9)")
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__arch_arm64
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__jited(" stp x25, x27, [sp, {{.*}}]!")
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__jited(" mov x27, {{.*}}")
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__jited(" movk x27, {{.*}}, lsl #16")
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__jited(" movk x27, {{.*}}")
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__jited(" mrs x10, TPIDR_EL{{[0-1]}}")
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__jited(" add x27, x27, x10")
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__jited(" add x25, x27, {{.*}}")
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__jited(" mov x0, #0x2a")
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__jited(" str x0, [x27]")
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__jited("...")
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__jited(" ldp x25, x27, [sp], {{.*}}")
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__naked void private_stack_single_prog(void)
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{
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asm volatile (" \
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r1 = 42; \
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*(u64 *)(r10 - 256) = r1; \
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r0 = 0; \
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exit; \
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" ::: __clobber_all);
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}
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SEC("raw_tp")
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__description("No private stack")
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__success
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__arch_x86_64
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__jited(" subq $0x8, %rsp")
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__arch_arm64
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__jited(" mov x25, sp")
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__jited(" sub sp, sp, #0x10")
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__naked void no_private_stack_nested(void)
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{
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asm volatile (" \
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r1 = 42; \
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*(u64 *)(r10 - 8) = r1; \
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r0 = 0; \
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exit; \
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" ::: __clobber_all);
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}
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__used
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__naked static void cumulative_stack_depth_subprog(void)
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{
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asm volatile (" \
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r1 = 41; \
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*(u64 *)(r10 - 32) = r1; \
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call %[bpf_get_smp_processor_id]; \
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exit; \
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" :
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: __imm(bpf_get_smp_processor_id)
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: __clobber_all);
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}
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SEC("kprobe")
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__description("Private stack, subtree > MAX_BPF_STACK")
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__success
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__arch_x86_64
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/* private stack fp for the main prog */
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__jited(" movabsq $0x{{.*}}, %r9")
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__jited(" addq %gs:{{.*}}, %r9")
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__jited(" movl $0x2a, %edi")
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__jited(" movq %rdi, -0x200(%r9)")
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__jited(" pushq %r9")
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__jited(" callq 0x{{.*}}")
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__jited(" popq %r9")
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__jited(" xorl %eax, %eax")
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__arch_arm64
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__jited(" stp x25, x27, [sp, {{.*}}]!")
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__jited(" mov x27, {{.*}}")
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__jited(" movk x27, {{.*}}, lsl #16")
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__jited(" movk x27, {{.*}}")
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__jited(" mrs x10, TPIDR_EL{{[0-1]}}")
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__jited(" add x27, x27, x10")
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__jited(" add x25, x27, {{.*}}")
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__jited(" mov x0, #0x2a")
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__jited(" str x0, [x27]")
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__jited(" bl {{.*}}")
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__jited("...")
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__jited(" ldp x25, x27, [sp], {{.*}}")
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__naked void private_stack_nested_1(void)
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{
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asm volatile (" \
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r1 = 42; \
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*(u64 *)(r10 - %[max_bpf_stack]) = r1; \
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call cumulative_stack_depth_subprog; \
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r0 = 0; \
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exit; \
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" :
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: __imm_const(max_bpf_stack, MAX_BPF_STACK)
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: __clobber_all);
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}
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__naked __noinline __used
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static unsigned long loop_callback(void)
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{
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asm volatile (" \
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call %[bpf_get_prandom_u32]; \
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r1 = 42; \
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*(u64 *)(r10 - 512) = r1; \
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call cumulative_stack_depth_subprog; \
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r0 = 0; \
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exit; \
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" :
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: __imm(bpf_get_prandom_u32)
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: __clobber_common);
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}
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SEC("raw_tp")
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__description("Private stack, callback")
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__success
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__arch_x86_64
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/* for func loop_callback */
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__jited("func #1")
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__jited(" endbr64")
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__jited(" nopl (%rax,%rax)")
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__jited(" nopl (%rax)")
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__jited(" pushq %rbp")
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__jited(" movq %rsp, %rbp")
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__jited(" endbr64")
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__jited(" movabsq $0x{{.*}}, %r9")
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__jited(" addq %gs:{{.*}}, %r9")
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__jited(" pushq %r9")
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__jited(" callq")
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__jited(" popq %r9")
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__jited(" movl $0x2a, %edi")
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__jited(" movq %rdi, -0x200(%r9)")
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__jited(" pushq %r9")
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__jited(" callq")
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__jited(" popq %r9")
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__arch_arm64
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__jited("func #1")
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__jited("...")
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__jited(" stp x25, x27, [sp, {{.*}}]!")
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__jited(" mov x27, {{.*}}")
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__jited(" movk x27, {{.*}}, lsl #16")
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__jited(" movk x27, {{.*}}")
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__jited(" mrs x10, TPIDR_EL{{[0-1]}}")
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__jited(" add x27, x27, x10")
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__jited(" add x25, x27, {{.*}}")
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__jited(" bl 0x{{.*}}")
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__jited(" mov x7, x0")
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__jited(" mov x0, #0x2a")
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__jited(" str x0, [x27]")
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__jited(" bl 0x{{.*}}")
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__jited(" mov x7, x0")
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__jited(" mov x7, #0x0")
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__jited(" ldp x25, x27, [sp], {{.*}}")
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__naked void private_stack_callback(void)
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{
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asm volatile (" \
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r1 = 1; \
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r2 = %[loop_callback]; \
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r3 = 0; \
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r4 = 0; \
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call %[bpf_loop]; \
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r0 = 0; \
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exit; \
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" :
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: __imm_ptr(loop_callback),
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__imm(bpf_loop)
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: __clobber_common);
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}
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SEC("fentry/bpf_fentry_test9")
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__description("Private stack, exception in main prog")
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__success __retval(0)
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__arch_x86_64
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__jited(" pushq %r9")
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__jited(" callq")
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__jited(" popq %r9")
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__arch_arm64
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__jited(" stp x29, x30, [sp, #-0x10]!")
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__jited(" mov x29, sp")
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__jited(" stp xzr, x26, [sp, #-0x10]!")
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__jited(" mov x26, sp")
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__jited(" stp x19, x20, [sp, #-0x10]!")
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__jited(" stp x21, x22, [sp, #-0x10]!")
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__jited(" stp x23, x24, [sp, #-0x10]!")
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__jited(" stp x25, x26, [sp, #-0x10]!")
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__jited(" stp x27, x28, [sp, #-0x10]!")
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__jited(" mov x27, {{.*}}")
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__jited(" movk x27, {{.*}}, lsl #16")
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__jited(" movk x27, {{.*}}")
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__jited(" mrs x10, TPIDR_EL{{[0-1]}}")
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__jited(" add x27, x27, x10")
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__jited(" add x25, x27, {{.*}}")
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__jited(" mov x0, #0x2a")
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__jited(" str x0, [x27]")
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__jited(" mov x0, #0x0")
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__jited(" bl 0x{{.*}}")
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__jited(" mov x7, x0")
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__jited(" ldp x27, x28, [sp], #0x10")
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int private_stack_exception_main_prog(void)
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{
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asm volatile (" \
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r1 = 42; \
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*(u64 *)(r10 - 512) = r1; \
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" ::: __clobber_common);
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bpf_throw(0);
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return 0;
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}
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__used static int subprog_exception(void)
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{
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bpf_throw(0);
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return 0;
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}
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SEC("fentry/bpf_fentry_test9")
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__description("Private stack, exception in subprog")
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__success __retval(0)
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__arch_x86_64
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__jited(" movq %rdi, -0x200(%r9)")
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__jited(" pushq %r9")
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__jited(" callq")
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__jited(" popq %r9")
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__arch_arm64
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__jited(" stp x27, x28, [sp, #-0x10]!")
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__jited(" mov x27, {{.*}}")
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__jited(" movk x27, {{.*}}, lsl #16")
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__jited(" movk x27, {{.*}}")
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__jited(" mrs x10, TPIDR_EL{{[0-1]}}")
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__jited(" add x27, x27, x10")
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__jited(" add x25, x27, {{.*}}")
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__jited(" mov x0, #0x2a")
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__jited(" str x0, [x27]")
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__jited(" bl 0x{{.*}}")
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__jited(" mov x7, x0")
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__jited(" ldp x27, x28, [sp], #0x10")
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int private_stack_exception_sub_prog(void)
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{
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asm volatile (" \
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r1 = 42; \
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*(u64 *)(r10 - 512) = r1; \
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call subprog_exception; \
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" ::: __clobber_common);
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return 0;
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}
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int glob;
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__noinline static void subprog2(int *val)
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{
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glob += val[0] * 2;
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}
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__noinline static void subprog1(int *val)
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{
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int tmp[64] = {};
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tmp[0] = *val;
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subprog2(tmp);
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}
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__noinline static int timer_cb1(void *map, int *key, struct bpf_timer *timer)
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{
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subprog1(key);
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return 0;
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}
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__noinline static int timer_cb2(void *map, int *key, struct bpf_timer *timer)
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{
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return 0;
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}
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SEC("fentry/bpf_fentry_test9")
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__description("Private stack, async callback, not nested")
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__success __retval(0)
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__arch_x86_64
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__jited(" movabsq $0x{{.*}}, %r9")
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__arch_arm64
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__jited(" mrs x10, TPIDR_EL{{[0-1]}}")
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__jited(" add x27, x27, x10")
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__jited(" add x25, x27, {{.*}}")
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int private_stack_async_callback_1(void)
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{
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struct bpf_timer *arr_timer;
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int array_key = 0;
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arr_timer = bpf_map_lookup_elem(&array, &array_key);
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if (!arr_timer)
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return 0;
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bpf_timer_init(arr_timer, &array, 1);
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bpf_timer_set_callback(arr_timer, timer_cb2);
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bpf_timer_start(arr_timer, 0, 0);
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subprog1(&array_key);
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return 0;
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}
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SEC("fentry/bpf_fentry_test9")
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__description("Private stack, async callback, potential nesting")
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__success __retval(0)
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__arch_x86_64
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__jited(" subq $0x100, %rsp")
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__arch_arm64
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__jited(" sub sp, sp, #0x100")
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int private_stack_async_callback_2(void)
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{
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struct bpf_timer *arr_timer;
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int array_key = 0;
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arr_timer = bpf_map_lookup_elem(&array, &array_key);
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if (!arr_timer)
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return 0;
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bpf_timer_init(arr_timer, &array, 1);
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bpf_timer_set_callback(arr_timer, timer_cb1);
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bpf_timer_start(arr_timer, 0, 0);
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subprog1(&array_key);
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return 0;
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}
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#else
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SEC("kprobe")
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__description("private stack is not supported, use a dummy test")
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__success
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int dummy_test(void)
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{
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return 0;
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}
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#endif
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char _license[] SEC("license") = "GPL";
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