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adfcf6e89b
Replace the static array of algorithms with a call to an architecture helper to register algorithms. This serves two purposes: it avoid having to register all algorithms in a single central place, and it removes the need for the priority field by just registering the algorithms that the architecture considers suitable for the currently running CPUs. [hch@lst.de: register avx512 after avx2] Link: https://lore.kernel.org/20260527074539.2292913-3-hch@lst.de Link: https://lore.kernel.org/20260518051804.462141-11-hch@lst.de Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # kunit only on arm64 Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Cc: Alexandre Ghiti <alex@ghiti.fr> Cc: Arnd Bergmann <arnd@arndb.de> Cc: "Borislav Petkov (AMD)" <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Mason <clm@fb.com> Cc: Christian Borntraeger <borntraeger@linux.ibm.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: David Sterba <dsterba@suse.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Li Nan <linan122@huawei.com> Cc: Madhavan Srinivasan <maddy@linux.ibm.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Song Liu <song@kernel.org> Cc: Sven Schnelle <svens@linux.ibm.com> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: WANG Xuerui <kernel@xen0n.name> Cc: Will Deacon <will@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
97 lines
2.8 KiB
C
97 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <asm/cpufeature.h>
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extern const struct raid6_calls raid6_mmxx1;
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extern const struct raid6_calls raid6_mmxx2;
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extern const struct raid6_calls raid6_sse1x1;
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extern const struct raid6_calls raid6_sse1x2;
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extern const struct raid6_calls raid6_sse2x1;
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extern const struct raid6_calls raid6_sse2x2;
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extern const struct raid6_calls raid6_sse2x4;
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extern const struct raid6_calls raid6_avx2x1;
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extern const struct raid6_calls raid6_avx2x2;
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extern const struct raid6_calls raid6_avx2x4;
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extern const struct raid6_calls raid6_avx512x1;
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extern const struct raid6_calls raid6_avx512x2;
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extern const struct raid6_calls raid6_avx512x4;
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extern const struct raid6_recov_calls raid6_recov_ssse3;
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extern const struct raid6_recov_calls raid6_recov_avx2;
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extern const struct raid6_recov_calls raid6_recov_avx512;
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static inline int raid6_has_avx512(void)
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{
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return boot_cpu_has(X86_FEATURE_AVX2) &&
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boot_cpu_has(X86_FEATURE_AVX) &&
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boot_cpu_has(X86_FEATURE_AVX512F) &&
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boot_cpu_has(X86_FEATURE_AVX512BW) &&
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boot_cpu_has(X86_FEATURE_AVX512VL) &&
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boot_cpu_has(X86_FEATURE_AVX512DQ);
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}
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static inline bool raid6_has_avx2(void)
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{
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return boot_cpu_has(X86_FEATURE_AVX2) && boot_cpu_has(X86_FEATURE_AVX);
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}
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static inline bool raid6_has_ssse3(void)
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{
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return boot_cpu_has(X86_FEATURE_XMM) &&
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boot_cpu_has(X86_FEATURE_XMM2) &&
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boot_cpu_has(X86_FEATURE_SSSE3);
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}
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static inline bool raid6_has_sse2(void)
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{
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return boot_cpu_has(X86_FEATURE_MMX) &&
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boot_cpu_has(X86_FEATURE_FXSR) &&
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boot_cpu_has(X86_FEATURE_XMM) &&
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boot_cpu_has(X86_FEATURE_XMM2);
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}
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static inline bool raid6_has_sse1_or_mmxext(void)
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{
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return boot_cpu_has(X86_FEATURE_MMX) &&
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(boot_cpu_has(X86_FEATURE_XMM) ||
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boot_cpu_has(X86_FEATURE_MMXEXT));
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}
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static __always_inline void __init arch_raid6_init(void)
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{
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if (raid6_has_avx2()) {
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raid6_algo_add(&raid6_avx2x1);
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raid6_algo_add(&raid6_avx2x2);
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if (IS_ENABLED(CONFIG_X86_64))
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raid6_algo_add(&raid6_avx2x4);
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if (raid6_has_avx512()) {
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raid6_algo_add(&raid6_avx512x1);
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raid6_algo_add(&raid6_avx512x2);
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if (IS_ENABLED(CONFIG_X86_64))
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raid6_algo_add(&raid6_avx512x4);
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}
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} else if (IS_ENABLED(CONFIG_X86_64) || raid6_has_sse2()) {
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/* x86_64 can assume SSE2 as baseline */
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raid6_algo_add(&raid6_sse2x1);
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raid6_algo_add(&raid6_sse2x2);
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if (IS_ENABLED(CONFIG_X86_64))
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raid6_algo_add(&raid6_sse2x4);
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} else {
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raid6_algo_add_default();
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if (raid6_has_sse1_or_mmxext()) {
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raid6_algo_add(&raid6_sse1x1);
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raid6_algo_add(&raid6_sse1x2);
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} else if (boot_cpu_has(X86_FEATURE_MMX)) {
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raid6_algo_add(&raid6_mmxx1);
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raid6_algo_add(&raid6_mmxx2);
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}
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}
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if (raid6_has_avx512())
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raid6_recov_algo_add(&raid6_recov_avx512);
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else if (raid6_has_avx2())
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raid6_recov_algo_add(&raid6_recov_avx2);
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else if (raid6_has_ssse3())
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raid6_recov_algo_add(&raid6_recov_ssse3);
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}
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