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Replace the static array of algorithms with a call to an architecture helper to register algorithms. This serves two purposes: it avoid having to register all algorithms in a single central place, and it removes the need for the priority field by just registering the algorithms that the architecture considers suitable for the currently running CPUs. [hch@lst.de: register avx512 after avx2] Link: https://lore.kernel.org/20260527074539.2292913-3-hch@lst.de Link: https://lore.kernel.org/20260518051804.462141-11-hch@lst.de Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # kunit only on arm64 Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Cc: Alexandre Ghiti <alex@ghiti.fr> Cc: Arnd Bergmann <arnd@arndb.de> Cc: "Borislav Petkov (AMD)" <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Mason <clm@fb.com> Cc: Christian Borntraeger <borntraeger@linux.ibm.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: David Sterba <dsterba@suse.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Li Nan <linan122@huawei.com> Cc: Madhavan Srinivasan <maddy@linux.ibm.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Song Liu <song@kernel.org> Cc: Sven Schnelle <svens@linux.ibm.com> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: WANG Xuerui <kernel@xen0n.name> Cc: Will Deacon <will@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
129 lines
3.0 KiB
Ucode
129 lines
3.0 KiB
Ucode
// SPDX-License-Identifier: GPL-2.0
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/*
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* raid6_vx$#.c
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*
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* $#-way unrolled RAID6 gen/xor functions for s390
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* based on the vector facility
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*
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* Copyright IBM Corp. 2016
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
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*
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* This file is postprocessed using unroll.awk.
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*/
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#include <linux/cpufeature.h>
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#include <asm/fpu.h>
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#include "algos.h"
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#define NSIZE 16
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static __always_inline void LOAD_CONST(void)
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{
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fpu_vrepib(24, 0x07);
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fpu_vrepib(25, 0x1d);
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}
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/*
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* The SHLBYTE() operation shifts each of the 16 bytes in
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* vector register y left by 1 bit and stores the result in
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* vector register x.
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*/
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#define SHLBYTE(x, y) fpu_vab(x, y, y)
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/*
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* For each of the 16 bytes in the vector register y the MASK()
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* operation returns 0xFF if the high bit of the byte is 1,
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* or 0x00 if the high bit is 0. The result is stored in vector
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* register x.
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*/
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#define MASK(x, y) fpu_vesravb(x, y, 24)
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#define AND(x, y, z) fpu_vn(x, y, z)
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#define XOR(x, y, z) fpu_vx(x, y, z)
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#define LOAD_DATA(x, ptr) fpu_vlm(x, x + $# - 1, ptr)
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#define STORE_DATA(x, ptr) fpu_vstm(x, x + $# - 1, ptr)
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#define COPY_VEC(x, y) fpu_vlr(x, y)
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static void raid6_s390vx$#_gen_syndrome(int disks, size_t bytes, void **ptrs)
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{
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DECLARE_KERNEL_FPU_ONSTACK32(vxstate);
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u8 **dptr, *p, *q;
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int d, z, z0;
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kernel_fpu_begin(&vxstate, KERNEL_VXR);
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LOAD_CONST();
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dptr = (u8 **) ptrs;
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z0 = disks - 3; /* Highest data disk */
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p = dptr[z0 + 1]; /* XOR parity */
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q = dptr[z0 + 2]; /* RS syndrome */
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for (d = 0; d < bytes; d += $#*NSIZE) {
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LOAD_DATA(0,&dptr[z0][d]);
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COPY_VEC(8+$$,0+$$);
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for (z = z0 - 1; z >= 0; z--) {
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MASK(16+$$,8+$$);
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AND(16+$$,16+$$,25);
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SHLBYTE(8+$$,8+$$);
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XOR(8+$$,8+$$,16+$$);
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LOAD_DATA(16,&dptr[z][d]);
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XOR(0+$$,0+$$,16+$$);
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XOR(8+$$,8+$$,16+$$);
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}
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STORE_DATA(0,&p[d]);
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STORE_DATA(8,&q[d]);
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}
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kernel_fpu_end(&vxstate, KERNEL_VXR);
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}
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static void raid6_s390vx$#_xor_syndrome(int disks, int start, int stop,
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size_t bytes, void **ptrs)
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{
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DECLARE_KERNEL_FPU_ONSTACK32(vxstate);
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u8 **dptr, *p, *q;
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int d, z, z0;
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dptr = (u8 **) ptrs;
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z0 = stop; /* P/Q right side optimization */
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p = dptr[disks - 2]; /* XOR parity */
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q = dptr[disks - 1]; /* RS syndrome */
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kernel_fpu_begin(&vxstate, KERNEL_VXR);
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LOAD_CONST();
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for (d = 0; d < bytes; d += $#*NSIZE) {
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/* P/Q data pages */
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LOAD_DATA(0,&dptr[z0][d]);
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COPY_VEC(8+$$,0+$$);
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for (z = z0 - 1; z >= start; z--) {
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MASK(16+$$,8+$$);
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AND(16+$$,16+$$,25);
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SHLBYTE(8+$$,8+$$);
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XOR(8+$$,8+$$,16+$$);
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LOAD_DATA(16,&dptr[z][d]);
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XOR(0+$$,0+$$,16+$$);
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XOR(8+$$,8+$$,16+$$);
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}
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/* P/Q left side optimization */
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for (z = start - 1; z >= 0; z--) {
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MASK(16+$$,8+$$);
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AND(16+$$,16+$$,25);
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SHLBYTE(8+$$,8+$$);
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XOR(8+$$,8+$$,16+$$);
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}
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LOAD_DATA(16,&p[d]);
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XOR(16+$$,16+$$,0+$$);
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STORE_DATA(16,&p[d]);
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LOAD_DATA(16,&q[d]);
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XOR(16+$$,16+$$,8+$$);
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STORE_DATA(16,&q[d]);
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}
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kernel_fpu_end(&vxstate, KERNEL_VXR);
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}
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const struct raid6_calls raid6_s390vx$# = {
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.gen_syndrome = raid6_s390vx$#_gen_syndrome,
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.xor_syndrome = raid6_s390vx$#_xor_syndrome,
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.name = "vx128x$#",
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};
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