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fd5017138c
Since commitaefbab8e77("arm64: fpsimd: Preserve/restore kernel mode NEON at context switch"), kernel-mode NEON sections have been preemptible on arm64. And since commit7dadeaa6e8("sched: Further restrict the preemption modes"), voluntary preemption is no longer supported on arm64 either. Therefore, there's no longer any need to limit the length of kernel-mode NEON sections on arm64. Simplify the SHA-1 code accordingly. Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20260401000548.133151-6-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
32 lines
769 B
C
32 lines
769 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* SHA-1 optimized for ARM64
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*
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* Copyright 2025 Google LLC
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*/
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#include <asm/simd.h>
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#include <linux/cpufeature.h>
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_ce);
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asmlinkage void sha1_ce_transform(struct sha1_block_state *state,
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const u8 *data, size_t nblocks);
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static void sha1_blocks(struct sha1_block_state *state,
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const u8 *data, size_t nblocks)
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{
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if (static_branch_likely(&have_ce) && likely(may_use_simd())) {
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scoped_ksimd()
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sha1_ce_transform(state, data, nblocks);
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} else {
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sha1_blocks_generic(state, data, nblocks);
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}
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}
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#define sha1_mod_init_arch sha1_mod_init_arch
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static void sha1_mod_init_arch(void)
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{
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if (cpu_have_named_feature(SHA1))
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static_branch_enable(&have_ce);
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}
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