Yixun Lan 2f20c859a8 clk: spacemit: k3: Fix PCIe clock register offset ... The offset of PCIe Clock CTRL register for port B and C controller was wrongly swapped, correct it here. Fixes: 091d19cc24 ("clk: spacemit: k3: extract common header") Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260511-06-pci-clk-fix-v2-2-c9a5e563bab3@kernel.org Signed-off-by: Yixun Lan <dlan@kernel.org>		2026-06-02 07:16:59 +00:00
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ccu.h	clk: spacemit: prepare common ccu header	2026-01-09 08:47:53 +08:00
k1-syscon.h	clk: spacemit: prepare common ccu header	2026-01-09 08:47:53 +08:00
k3-syscon.h	clk: spacemit: k3: Fix PCIe clock register offset	2026-06-02 07:16:59 +00:00