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e8014b2c83
Populate the IO pads and pins for Tegra264. Tegra264 has internal 1.8V and 0.6V regulators that must be enabled when selecting the 1.8V mode for the sdmmc1-hv IO pad. To support this a new 'ena_1v8' member is added to the 'tegra_io_pad_vctrl' structure to populate the bits that need to be set to enable these internal regulators. Although this is enabling 1.8V (bit 1) and 0.6V (bit 2) regulators, it is simply called 'ena_1v8' because these are both enabled for 1.8V operation. Note that these internal regulators are disabled when not using 1.8V mode. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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| .. | ||
| cbb | ||
| fuse | ||
| ari-tegra186.c | ||
| common.c | ||
| flowctrl.c | ||
| Kconfig | ||
| Makefile | ||
| pmc.c | ||
| regulators-tegra20.c | ||
| regulators-tegra30.c | ||