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1c351103ce
Some QE GPIO pins have an associated interrupt line in the QE PIC to signal state changes on the pin. Because the GPIO controller does not perform any interrupt handling itself, a nexus node (interrupt-map) is used to map each GPIO line supporting IRQ to the parent QE PIC interrupt domain. Add the to_irq() method in the corresponding GPIO controller driver, that uses the nexus node to perform the translation. Signed-off-by: Paul Louvel <paul.louvel@bootlin.com> Reviewed-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-10-1972044cfbd1@bootlin.com [chleroy: Added dependency on !SPARC to fix build on sparc reported by 0-day kernel robot] Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
80 lines
1.8 KiB
Plaintext
80 lines
1.8 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# QE Communication options
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#
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config QUICC_ENGINE
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bool "QUICC Engine (QE) framework support"
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depends on OF && HAS_IOMEM
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depends on PPC || ARM || ARM64 || COMPILE_TEST
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select GENERIC_ALLOCATOR
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select CRC32
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help
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The QUICC Engine (QE) is a new generation of communications
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coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
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Selecting this option means that you wish to build a kernel
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for a machine with a QE coprocessor.
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config UCC_SLOW
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bool
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default y if SERIAL_QE || (CPM_QMC && QUICC_ENGINE)
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help
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This option provides qe_lib support to UCC slow
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protocols: UART, BISYNC, QMC
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config UCC_FAST
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bool
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default y if UCC_GETH || QE_TDM
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help
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This option provides qe_lib support to UCC fast
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protocols: HDLC, Ethernet, ATM, transparent
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config UCC
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bool
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default y if UCC_FAST || UCC_SLOW || (CPM_TSA && QUICC_ENGINE)
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config CPM_TSA
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tristate "CPM/QE TSA support"
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depends on OF && HAS_IOMEM
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depends on CPM1 || QUICC_ENGINE || \
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((CPM || QUICC_ENGINE) && COMPILE_TEST)
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help
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Freescale CPM/QE Time Slot Assigner (TSA)
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controller.
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This option enables support for this
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controller
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config CPM_QMC
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tristate "CPM/QE QMC support"
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depends on OF && HAS_IOMEM
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depends on FSL_SOC
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depends on CPM_TSA
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help
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Freescale CPM/QE QUICC Multichannel Controller
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(QMC)
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This option enables support for this
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controller
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config QE_TDM
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bool
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default y if FSL_UCC_HDLC
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config QE_USB
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bool
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depends on QUICC_ENGINE
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default y if USB_FSL_QE
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help
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QE USB Controller support
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config QE_GPIO
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bool "QE GPIO support"
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depends on QUICC_ENGINE
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depends on !SPARC # Should be OF_IRQ but it leads to circ. dependency
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select GENERIC_IRQ_CHIP
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select GPIOLIB
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help
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Say Y here if you're going to use hardware that connects to the
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QE GPIOs.
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